TSC87C51 TEMIC Semiconductors, TSC87C51 Datasheet - Page 7

• Manufacturer Part Number: TSC87C51
• Description: CMOS 0 to 25 MHz Programmable 8-bit Microcontroller
• Manufacturer: TEMIC Semiconductors

Rev. E
Table 2 External pin status during ONCE mode
ALE Disabling
The ALE signal is used to demultiplex address and data buses on port 0 when used with external program or data
memory. Nevertheless, during internal code execution, ALE signal is still generated. In order to reduce EMI, ALE
signal should be disabled by setting AO bit.
The AO bit is located in MSCON at bit location 0 (see Table 3). As soon as AO is set, ALE is no longer output but
remains active during MOVX and MOVC instructions and external fetches. During ALE disabling, ALE pin is weakly
pulled high.
Table 3 MSCON – Miscellaneous Control Register (8Eh)
The reset value of MSCON is XXXX XXX0b.
UART
The UART in the TSC87C51 operates identically to the UART in the 80C51 but includes the following enhancement.
For a complete understanding of the TSC87C51 UART please refer to the description in the 80C51 Hardware
Description Guide.
Framing Error Detection
Framing error detection allows the serial port to check for missing stop bits in the communication in mode 1, 2 or 3.
A missing stop bit can be caused for example by noise on the serial lines or transmission by two CPUs simultaneously.
If a stop bit is missing a Framing Error bit (FE) is set. The FE bit can be checked in software after each reception to
detect communication errors. Once set, the FE bit must be cleared in software. A valid stop bit will not clear FE.
The FE bit is located in SCON at bit location 7. It shares the same bit location as SM0 (see Table 4). The new control
bit SMOD0 in PCON (see Table 1) determines whether the SM0 or FE bit is accessed (see Figure 3), so whether the
framing error detection is enabled or not. If SMOD0 is set then SCON.7 functions as FE, if SMOD0 is cleared then
SCON.7 functions as SM0. Once set, the FE bit must be cleared by software. A valid stop bit will not clear FE. When
UART is in mode 1 (8–bit mode), RI flag is set during stop bit whether or not framing error is enabled (see Figure 4).
When in mode 2 and 3 (9–bit mode), RI flag is set during stop bit if framing error is enabled or during ninth bit if not
(see Figure 5).
Weak pull–up
ALE
7
–
–
July 03, 2000
Symbol
AO
–
Weak pull–up
6
–
PSEN
Reserved
ALE Output bit
Do not write 1 in these bits.
Set to disable ALE operation during internal fetches.
Clear to restore ALE operation during internal fetches.
5
–
Port 0
Float
4
–
Weak pull–up
Port 1
3
–
Description
Weak pull–up
Port 2
2
–
Weak pull–up
TSC87C51
Port 3
1
–
XTAL1/2
Active
AO
0
7