TSC87C51 TEMIC Semiconductors, TSC87C51 Datasheet - Page 6

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TSC87C51

Manufacturer Part Number
TSC87C51
Description
CMOS 0 to 25 MHz Programmable 8-bit Microcontroller
Manufacturer
TEMIC Semiconductors
Datasheet

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TSC87C51
New and Enhanced Features
In comparison to the original 80C51, the TSC87C51 implements some new and enhanced features. The new features
are the Power Off Flag, the ONCE mode and the ALE disabling. The enhanced feature is located in the UART.
Power Off Flag
The Power Off Flag allows the user to distinguish between a ‘cold start’ reset and a ‘warm start’ reset.
A cold start reset is one that is coincident with VCC being turned on to the device after it was turned off. A warm start
reset occurs while VCC is still applied to the device and could be generated for example by an exit from Power Down.
The Power Off Flag (POF) is located in PCON at bit location 4 (see Table 1). POF is set by hardware when VCC rises
from 0 to its nominal voltage. The POF can be set or cleared by software allowing the user to determine the type of
reset.
Table 1 PCON – Power Control Register (87h)
The reset value of PCON is 00XX 0000b.
ONCE Mode
The ONCE mode facilitates testing and debugging of systems using TSC87C51 without the TSC87C51 having to be
removed from the circuit. The ONCE mode is invoked by driving certain pins of the TSC87C51, the following sequence
must be exercised.
D
D
While the TSC87C51 is in ONCE mode, an emulator or test CPU can be used to drive the circuit. Table 2 shows the
status of the port pins during ONCE mode.
Normal operation is restored when normal reset is applied.
6
SMOD1
Pull ALE low while the device is in reset (RST high) and PSEN is high.
Hold ALE low as RST is deactivated.
7
Symbol
SMOD1
SMOD0
POF
GF1
GF0
IDL
PD
SMOD0
6
Serial Port Mode bit 1, new name of SMOD bit
Serial Port Mode bit 0
Reserved
Power Off Flag
General purpose Flag
General purpose Flag
Power Down mode bit
Idle mode bit
Set to select double baud rate in mode 1,2 or 3.
Set to to select FE bit in SCON.
Clear to select SM0 bit in SCON.
Do not write 1 in this bit.
Set by hardware when VCC rises from 0 to its nominal voltage. Can also be set by software.
Clear by software to recognize next reset type.
Set by software for general purpose usage.
Clear by software for general purpose usage.
Set by software for general purpose usage.
Clear by software for general purpose usage.
Set to enter power down mode.
Clear by hardware when reset occurs.
Set to enter idle mode.
Clear by hardware when interrupt or reset occur.
5
POF
4
GF1
3
Description
GF0
2
PD
Rev. E
1
July 03, 2000
IDL
0

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