UCC1810 Unitrode Semiconductor, UCC1810 Datasheet - Page 4

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UCC1810

Manufacturer Part Number
UCC1810
Description
Low Power BiCMOS Dual Current Mode PWM
Manufacturer
Unitrode Semiconductor
Datasheet
PIN DESCRIPTIONS
COMP1, COMP2: The low impedance outputs of the er-
ror amplifiers.
CS1, CS2: The current sense inputs to the PWM compa-
rators. These inputs have leading edge blanking. For
most applications, no input filtering is required. Leading
edge blanking disconnects the CS inputs from all internal
circuits for the first 55ns of each PWM cycle. When used
with very slow diodes or in other applications where the
current sense signal is unusually noisy, a small current
sense RC filter may be required.
C
values of C
timing capacitor directly across C
ENABLE2: A logic input which disables PWM 2 when
low. This input has no effect on PWM 1. This input is in-
ternally pulled high. In most applications it can be left
floating. In unusually noisy applications, the input should
be bypassed with a 1nF ceramic capacitor. This input
has TTL compatible thresholds.
FB1, FB2: The high impedance inverting inputs of the er-
ror amplifiers.
GND: To separate noise from the critical control circuits,
this part has two different ground connections: GND and
PWRGND. GND and PWRGND must be electrically con-
nected together. However, use care to avoid coupling
noise into GND.
OUT1, OUT2: The high current push-pull outputs of the
PWM are intended to drive power MOSFET gates
through a small resistor. This resistor acts as both a cur-
rent limiting resistor and as a damping impedance to
minimize ringing and undershoot.
T
: The timing capacitor of the oscillator. Recommended
T
are between 100pF and 1nF. Connect the
T
and GND.
4
PWRGND: To separate noise from the critical control cir-
cuits, this part has two different ground connections:
GND and PWRGND. GND and PWRGND must be elec-
trically connected together.
REF: The output of the 5V reference. Bypass REF to
GND with a ceramic capacitor 0.01 F for best perform-
ance.
R
the resistor connected from R
lated to 1V, but the actual charging current is 10V/R
Recommended values of R
For a given frequency, higher timing resistors give higher
maximum duty cycle and slightly lower overall power
consumption. Supply current decreases with increased
R
For more information, see the detailed oscillator block
diagram.
SYNC: This logic input can be used to synchronize the
oscillator to a free running oscillator in another part. This
pin is edge triggered with TTL thresholds, and requires
at least a 10ns wide pulse. If unused, this pin can be
grounded, open circuited, or connected to REF.
V
to all functions including the high current output stages
and the precision reference. Therefore, it is critical that
V
ceramic capacitor.
CC
CC
T
T
: The oscillator charging current is set by the value of
by the relationship:
: The power input to the IC. This pin supplies current
be directly bypassed to PWRGND with an 0.1 F
I
CC
T
11 V
R
are between 10k and 470k.
T
T
to GND. This pin is regu-
UCC1810
UCC2810
UCC3810
T
.

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