UCC1883 Unitrode Semiconductor, UCC1883 Datasheet
![no-image](/images/no-image-200.jpg)
UCC1883
Related parts for UCC1883
UCC1883 Summary of contents
Page 1
... ISENSE input. When in restricted mode or lightly loaded, the UCC1883 operates with a minimum pulse width deter- mined by the leading edge blanking circuit. This eliminates the spurious EMI generated if arbitrarily short output pulses are produced by the PWM ...
Page 2
... PMOS pass transistor. Precision program- ming of the quiescent current used by the UCC1883 al- lows the system to meet the 25mW restricted mode power limit, or the current can be set to achieve higher operating frequencies at the cost of increased power consumption. The UCC1883 is fabricated in Unitrode’ ...
Page 3
... ELECTRICAL CHARACTERISTICS UCC3883 +85 C for the UCC2883 +125 C for the UCC1883, VCC 100pF PARAMETERS UVLO Section VCC Start Threshold VCC Threshold Hysteresis Linear Pre-Regulator Section Regulated VCC Voltage Regulated V to UVLO Delta CC VCC Override Threshold ...
Page 4
... ELECTRICAL CHARACTERISTICS UCC3883 +85 C for the UCC2883 +125 C for the UCC1883, VCC 100pF PARAMETER Isolation Interface Section FB Input High Voltage FB Input Low Voltage FB Input Pulse Width FB Output Width LOLINE Status Threshold RSMODE Status Threshold VDD Regulator ...
Page 5
... USER BIAS PROGRAMMING The RBIAS pin may be used to set the amount of quies- cent current consumed by certain analog circuits within the UCC1883. A resistor from this pin to VSS establishes a reference current according to the equation 1.2V IBIAS RBIAS Recommended range for RBIAS is 39 ...
Page 6
... The pre-regulator may sub- sequently be fully disabled by a tertiary bootstrap winding providing a minimum of 10.6V to the VCC pin. Note that the UCC1883 has 2V of UVLO hysteresis to allow use of more conventional startup circuitry, if the power sumption of such implementations can be tolerated. In these cases, any value of bypass capacitance is accept- able, although a minimum value of 0 ...
Page 7
... Recall that no UCC1885 output will occur until a voltage greater than 1.2V is initially established on VLINE. VDD LOGIC SUPPLY The internal CMOS logic on the UCC1883 runs from a regulated 5V which is available externally at the VDD pin. This pin should be bypassed to VSS with a high quality ceramic capacitor having a value of at least 0.01 F. Val- ues in excess are not recommended ...
Page 8
... This reconstructed voltage is in turn used to control the peak current mode PWM. The ratio of the slope of the UCC1883 timing ramp to the UCC1885 tim- ing ramp sets the gain applied by the UCC1883 to the UCC1885 error amplifier output. Other variations of the UCC1883 implementing voltage mode control, duty cycles greater than 50%, or faster natural oscillator frequencies may be available ...
Page 9
... APPLICATION INFORMATION (cont.) UNITRODE INTEGRATED CIRCUITS 7 CONTINENTAL BLVD. MERRIMACK, NH 03054 TEL. (603) 424-2410 FAX (603) 424-3460 Figure 9. Oscillator Frequency Versus RBIAS Figure 10. Typical Application Circuit 9 UCC1883 UCC2883 UCC3883 UDG-94089 UDG-94090 ...