IDT72V3650 Integrated Device Technology, IDT72V3650 Datasheet - Page 11

• Manufacturer Part Number: IDT72V3650
• Description: 2k X 36 Supersync Ii Fifo, 3.3v
• Manufacturer: Integrated Device Technology

AC TEST CONDITIONS
NOTE:
1. For 166MHz and 133MHz operation input rise/fall times are 1.5ns.
AC TEST LOADS - 10ns, 15ns Speed Grades
OUTPUT ENABLE & DISABLE TIMING
NOTE:
1. REN is HIGH.
Normally
Normally
IDT72V3640/50/60/70/80/90 3.3V HIGH DENSITY SUPERSYNC II
1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36 and 32,768 x 36
Output
Output
Input Pulse Levels
Input Rise/Fall Times
Input Timing Reference Levels
Output Reference Levels
Output Load for t
Output Load for t
HIGH
LOW
V
V
OE
2
CC
2
CC
D.U.T.
CLK
CLK
* Includes jig and scope capacitances.
= 6ns, 7.5ns
= 10ns, 15 ns
510Ω
Figure 2a. Output Load
Enable
Output
3.3V
100mV
100mV
t
OE &
330Ω
30pF*
t
OLZ
4667 drw04
See Figure 2b & 2c
See Figure 2a
GND to 3.0V
3ns
1.5V
1.5V
(1)
Disable
Output
100mV
TM
t
OHZ
11
36-BIT FIFO
AC TEST LOADS - 6ns, 7.5ns Speed Grades
Figure 2c. Lumped Capacitive Load, Typical Derating
I/O
100mV
6
5
4
3
2
1
20 30 50
Figure 2b. AC Test Load
Z
Capacitance (pF)
0
COMMERCIAL AND INDUSTRIAL
4667 drw04c
= 50
80 100
Ω
V
V
V
V
V
V
TEMPERATURE RANGES
CC
2
CC
2
50
IL
OH
IH
OL
Ω
1.5V
4667 drw04a
4667 drw04b
APRIL 6, 2006
200