MC33926 Freescale Semiconductor, MC33926 Datasheet - Page 9

• Manufacturer Part Number: MC33926
• Description: 5.0 A Throttle Control H-Bridge
• Manufacturer: Freescale Semiconductor

Table 4. Dynamic Electrical Characteristics
values noted reflect the approximate parameter means at T
TIMING CHARACTERISTICS
Notes
Analog Integrated Circuit Device Data
Freescale Semiconductor
PWM Frequency
Maximum Switching Frequency During Current Limit Regulation
Output ON Delay
Output OFF Delay
I
I
Disable Delay Time
Output Rise and Fall Time
Short Circuit / Overtemperature Turn-OFF (Latch-OFF) Time
Power-ON Delay Time
Output MOSFET Body Diode Reverse Recovery Time
Charge Pump Operating Frequency
21.
22.
23.
24.
25.
26.
27.
28.
29.
LIM
LIM
Characteristics noted under conditions 8.0 V ≤ V
V
V
SLEW = SLOW
SLEW = FAST
Output Constant-OFF Time
Blanking Time
PWR
PWR
The maximum PWM frequency is obtained when the device is set to Fast Slew Rate via the SLEW pin. PWM-ing when SLEW is set to
SLOW should be limited to frequencies < 11 kHz in order to allow the internal high-side driver circuitry time to fully enhance the high-side
MOSFETs.
The internal current limit circuitry produces a constant-OFF-time Pulse Width Modulation of the output current. The output load’s
inductance, capacitance, and resistance characteristics affect the total switching period (OFF-time + ON-time), and thus the PWM
frequency during current limit.
Output Delay is the time duration from 1.5V on the IN1 or IN2 input signal to the 20% or 80% point (dependent on the transition direction)
of the OUT1 or OUT2 signal. If the output is transitioning HIGH-to-LOW, the delay is from 1.5V on the input signal to the 80% point of the
output response signal. If the output is transitioning LOW-to-HIGH, the delay is from 1.5V on the input signal to the 20% point of the output
response signal. See
The time during which the internal constant-OFF time PWM current regulation circuit has tri-stated the output bridge.
The time during which the current regulation threshold is ignored so that the short-circuit detection threshold comparators may have time
to act.
Disable Delay Time measurement is defined in
Rise Time is from the 10% to the 90% level and Fall Time is from the 90% to the 10% level of the output signal with V
R
Load currents ramping up to the current regulation threshold become limited at the I
possess a di/dt that ramps up to the I
causing the shutdown circuitry to force the output into an immediate tri-state latch-OFF (see
may cause junction temperatures to rise. Junction temperatures above ~160
or decrease, until ~175
is limited to non-repetitive transient events of duration not to exceed 30 seconds (see
Parameter is Guaranteed By Design.
LOAD
= 14 V
= 14 V
= 3.0 ohm. See
(21)
(23)
(23)
(25)
(26)
(29)
(27)
Figure
°
Figure
C is reached, after which the T
Characteristic
(24)
4, page 10.
(29)
6, page 10.
DYNAMIC ELECTRICAL CHARACTERISTICS
SCH
or I
SCL
Figure
threshold during the I
(29)
PWR
LIM
(28) (29)
≤ 28 V, - 40°C ≤ T
5, page 10.
thermal latch-OFF will occur. Permissible operation within this fold back region
(22)
A
= 25°C under nominal conditions unless otherwise noted.
LIM
blanking time, registering as a short circuit event detection and
t
A
D
Symbol
°
t
t
DISABLE
f
t
f
t
FAULT
t
C will cause the output current limit threshold to “fold back”,
≤ 125°C, GND = 0 V unless otherwise noted. Typical
D
PWM
F
t
MAX
D
POD
f
t
t
R R
CP
OFF
, t
ON
A
B
R
LIM
Figure
DYNAMIC ELECTRICAL CHARACTERISTICS
value (see
Min
1.5
0.2
15
12
75
–
–
–
–
–
–
–
–
Figure
9).
Figure
ELECTRICAL CHARACTERISTICS
8). Operation in Current Limit mode
20.5
16.5
Typ
100
3.0
1.0
7.0
–
–
–
–
–
–
–
7). The short circuit currents
Max
1.45
150
8.0
6.0
8.0
5.0
20
20
18
12
32
27
–
PWR
= 14 V,
Unit
MHz
kHz
kHz
ms
µs
µs
µs
µs
µs
µs
µs
ns
33926
9