HT46R48E Holtek Semiconductor, HT46R48E Datasheet - Page 13

• Manufacturer Part Number: HT46R48E
• Description: Cost-Effective A/D Type 8-Bit OTP MCU
• Manufacturer: Holtek Semiconductor

Once a wake-up event occurs, it takes 1024 t
tem clock period) to resume normal operation. In other
words, a dummy period will be inserted after wake-up. If
the wake-up results from an interrupt acknowledgment,
the actual interrupt subroutine execution will be delayed
by one or more cycles. If the wake-up results in the next
instruction execution, this will be executed immediately
after the dummy period is finished.
To minimize power consumption, all the I/O pins should
be carefully managed before entering the HALT status.
Reset
There are three ways in which a reset can occur:
The WDT time-out during HALT is different from other
chip reset conditions, since it can perform a warm re -
set that resets only the program counter and stack
pointer, leaving the other circuits in their original state.
Some registers remain unchanged during other reset
conditions. Most registers are reset to the initial condi-
tion when the reset conditions are met. By examining
the PDF and TO flags, the program can distinguish be-
tween different chip resets .
Note: u means unchanged
To guarantee that the system oscillator is started and
stabilized, the SST (System Start-up Timer) provides an
extra-delay of 1024 system clock pulses when the sys-
tem reset (power-up, WDT time-out or RES reset) or the
system awakes from the HALT state.
When a system reset occurs, the SST delay is added
during the reset period. Any wake-up from HALT will en-
able the SST delay.
An extra option load time delay is added during system
reset (power-up, WDT time-out at normal mode or RES
reset).
Rev. 1.10
TO PDF
RES reset during normal operation
RES reset during HALT
WDT time-out reset during normal operation
0
u
0
1
1
0
u
1
u
1
RES reset during power-up
RES reset during normal operation
RES wake-up HALT
WDT time-out during normal operation
WDT wake-up HALT
RESET Conditions
SYS
(sys-
13
The functional unit chip reset status are shown below.
Note:
Program Counter
Interrupt
WDT
Timer/Event Counter Off
Input/Output Ports
Stack Pointer
nected to the RES pin as short as possible, to
avoid noise interference.
* Make the length of the wiring, which is con-
Reset Configuration
Reset Timing Chart
Reset Circuit
000H
Disable
Clear. After master reset,
WDT begins counting
Input mode
Points to the top of the stack
HT46R48E
March 24, 2006