83C694 ETC, 83C694 Datasheet
83C694
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83C694 Summary of contents
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... Twisted-Pair Interface and Manchester Encoder/Decoder 83C694D Data sheet ...
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... TP DIFFERENTIAL RECEIVER . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.7 LOOPBACK FUNCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.8 LINK TEST FUNCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.9 AUI/TP AUTOSELECT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.10 JABBER AND SQE TEST FUNCTIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.11 STATUS INDICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.12 TEST MODE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3.0 PIN DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4.0 DC ELECTRICAL SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4.1 ABSOLUTE MAXIMUM RATINGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4.2 RECOMMENDED OPERATING CONDITIONS 4.3 DC OPERATING CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 5.0 AC OPERATING CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 5.1 TIMING DIAGRAMS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 6.0 PACKAGE DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 TABLE OF CONTENTS 83C694D i ...
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... AUI RECEIVE PATH . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2-4 ZENER DIODE VOLTAGE REGULATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2-5 TWISTED PAIR TRANSMIT PATH AND TIMING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2-6 TWISTED PAIR RECEIVE PATH . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3-1 83C694C PLCC PACKAGE DIAGRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5-1 TRANSMIT TIMING - START OF TRANSMISSION 5-2 TRANSMIT TIMING - END OF TRANSMISSION (LAST BIT = 5-3 TRANSMIT TIMING - END OF TRANSMISSION (LAST BIT = 5-4 TRANSMIT TIMING - LINK TEST PULSE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 5-5 RECEIVE TIMING - START OF PACKET ...
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... Convert a digital output data stream into an analog high-current signal for transmission across a network cable. This means that the 83C694D serves as the logical link between a network cable on one end and a digital controller chip (such as the 83C690) on the other end. To accomplish these two functions, the 83C694D ...
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... TXE TXD 83C690 BUFFER MEMORY 802.3 ETHERNET CRS LAN RXD CONTROLLER RXC COL TXC PC BUS INTERFACE FIGURE 1-1. SYSTEM BLOCK DIAGRAM 2 TX+/- RX+/- CD+/- TX+/- RX+/- CD+/- 83C694C MANCHESTER TPX1+/- ENCODER/ DECODER TPX2+/- Transmit Filter TPR+/- Receive Filter INTRODUCTION 83B692 ETHERNET TRANSCEIVER ...
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... TPR- AUI RECEIVER RX+ RX- AUI DRIVER TX+ TX- SEL MODE1 LINK BEAT TP DRIVER 2 TPX+ TPX- 2 DIGITAL EQUALIZATION FIGURE 1-2. 83C694C BLOCK DIAGRAM LNK COLLISION JABBER DECODER MODE1 MODE2 COL SMART SQUELCH LNK LINK TEST RECEIVE POLARITY CORRECT PLL DECODER LBKCTL LOOPBACK FUNCTIONS CRYSTAL ...
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... ARCHITECTURE The 83C694D can be used as an AUI device twisted-pair interface device. When used in combination TPI/AUI applications, the 83C694D is part of a three-device set that implements the complete IEEE 802.3-compatible network node electronics (see Figure 1-1). The 83C690 Ethernet LAN Controller (ELC) and the 83B692 Ethernet Transceiver (ET) comprise the other two devices in the set ...
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... When the input exceeds the squelch limits, the analog phase-locked loop locks onto the incoming signal and the 83C694D decodes a data frame. The carrier sense (CRS) is activated, and the re- ceive data (RXD) and receive clock (RXC) become available within five bit times ...
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... Figure 2-4. 2.4 COLLISION TRANSLATOR When the 83C694D is used as an AUI device, a separate Ethernet transceiver detects collisions on the coaxial cable and generates a 10 MHz signal, which is monitored by the 83C694D through the collision detect pins. The presence of the signal ...
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... LOOPBACK FUNCTION When the loopback input goes high it causes the 83C694D to send serial data from the transmit data input through the encoder, and back through the phase-locked loop and decoder to the receive data output. The transmit driver is in the idle state during loopback mode and the receiver circuitry and colli- sion detection are disabled ...
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... LEDs can be driven by four out- puts from the 83C694D. These show the result of Link Test, polarity check, and transmit or receive activity. An LED test feature is built into the 83C694D. All LEDs turn on for 2/3 second after a reset to the device. 2.12 TEST MODE Three test modes can be selected when the SEL pin is set to intermediate voltages ...
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... PIN DESCRIPTION 3.0 PIN DESCRIPTION Figure 3-1 illustrates the signal names and pin locations on the 44-pin PLCC 83C694D package. Table 3-1 lists the signal names and descriptions for the 83C694D SEL LNK 8 TPOL 9 GND 10 GND 11 GND 12 13 GND 14 RLED XLED 15 LBK FIGURE 3-1 ...
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... PIN MNEMONIC SIGNAL NAME NUMBER 1 COL Collision Detect Connect 3 RXD Receive Data 4 CRS Carrier Sense 5 RES Reset/Synch 6 RXC Receive Clock 7 SEL Mode Select 10 I MHz (+25%,-15%) signal at the CD inputs (DTE mode) produces a logic high at the COL output. When no signal is present at the CD inputs, the COL output goes low ...
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... When active low, XLED sinks 10mA to drive an external LED. When there is no transmis- sion (TXE inactive), XLED is high. When data is transmitted, XLED goes active low for ap- proximately 50ms longer than the transmitted packet length. XLED does not go active low for Link Test pulses. 83C694D 11 ...
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... PIN MNEMONIC SIGNAL NAME NUMBER 16 LBK Loopback 17 X1 Crystal/Ext. Input 18 X2 Crystal Feedback 19 TXD Transmit Data 20 TXC Transmit Clock 21 TXE Transmit Enable 22 TPX2- TwPr Transmit 23 TPX1- TwPr Transmit TABLE 3-1. PIN DESCRIPTION cont. 12 I/O DESCRIPTION I A high level enables loopback of TXD to RXD/RXC. A low level enables normal trans- mit/receive operation ...
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... The MODE1 pin includes an internal pull-up resistor can be left open if not used. I When MODE2 is low, automatic link polarity correction is disabled (TP mode only). Auto- polarity correction is enabled when MODE2 is high. The MODE2 pin includes an internal pull up resistor may be left open if not used. 83C694D 13 ...
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... PIN MNEMONIC SIGNAL NAME NUMBER 32, 33, VCC Positive Supply 34 Not Connected 37 TST Test Input 38 BSR Bias Resistor 39 RX- AUI Receive 40 RX+ 41 CD- AUI Collision 42 CD+ TABLE 3-1. PIN DESCRIPTION cont. 14 I/O DESCRIPTION Pin 32 is positive supply to the VCO. Pin 33 is positive supply for digital and transmit cir- cuits ...
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... A 100 termination resistor is generally used before the circuit connects to the receive sig- nal lines, TPR+ and TPR- inputs. See Figure 2-5 for information on this design. The 83C694D automatically corrects for a misconnection of the + and - interface allow- ing operation without having to correct the wiring. ...
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DC ELECTRICAL SPECIFICATIONS 4.1 ABSOLUTE MAXIMUM RATINGS Supply Voltage (Vcc ...
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DC ELECTRICAL SPECIFICATIONS SYMBOL CHARACTERISTIC Vol Output Low Voltage (RXD, RXC, CRS, TXC, COL) Output Low Voltage (X2) Output Low Voltage (LEDs) Iol Output Low Current (LEDs) Ios Output Short Circuit Current (RXD, RXC, CRS, TXC, COL) Vod Differential Output ...
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... AC OPERATING CHARACTERISTICS Ta = 0°C (32°F) to 70°C (158°F) Vcc = 5V 5% All typical values are given for Vcc = 5V and Ta = 25°C (77°F). SYMBOL PARAMETER t X1 rising edge to Transmit Clock High XTH t X1 rising edge to Transmit Clock Low XTL t Transmit Clock Duty Cycle at 50% (10 MHz) ...
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... TABLE 5-1. AC OPERATING CHARACTERISTICS MIN – – – Collision Specification – – 100 – 0.6 0.5 Loopback Specification 35 350 10BaseT Protocol Timers 9.8 78 4.9 39 314 83C694D TYP MAX UNITS – 700 nsec – 950 nsec 25 35 nsec 20 30 nsec – 200 nsec – 60 nsec – ...
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... TABLE 5–2. 83C694D TIMING DIAGRAMS 20 AC OPERATING CHARACTERISTICS Title Transmit Timing – Start of Transmission Transmit Timing – End of Transmission (last bit = 0) Transmit Timing – End of Transmission (last bit = 1) Transmit Timing – Link Test Pulse Receive Timing – ...
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... AC OPERATING CHARACTERISTICS TXC TXE TXD TX+ TX- TPX2+ TPX1+ TPX1- TPX2- FIGURE 5-1. TX TIMING - START OF TRANSMISSION FIGURE 5-2. TX TIMING - END OF TRANSMISSION (LAST BIT=0) 1.5V t TES 1.5V t TDH t TDS 1.5V 1.5V t TOD 83C694D 21 ...
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... TXC TXE 1 1 TXD TX+ TX TPX2+ TPX1+ TPX1- TPX2 FIGURE 5-3. TX TIMING - END OF TRANSMISSION (LAST BIT=1) TXC TPX2+ TPX1+ TPX1- TPX2- FIGURE 5-4. TX TIMING - LINK TEST PULSE 22 AC OPERATING CHARACTERISTICS 1.5V t TEH 1. TOI t TOH LTP ...
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... FIGURE 5-5. RECEIVE TIMING - START OF PACKET RX+/RX- or TPRX+/TPRX- CRS t RD RXC RXD FIGURE 5-6. RECEIVE TIMING - END OF PACKET (LAST BIT = 0) FIRST BIT DECODED 1.5V 1. CSOFF 1.5V 5 EXTRA CLOCKS 0 83C694D RDS t RDS ...
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... RX+ RX- CRS RXC RXD FIGURE 5-7. RECEIVE TIMING - END OF PACKET (LAST BIT = 1) CD+ CD- t COLON 1.5V COL FIGURE 5-8. COLLISION TIMING (AUI CSOFF 5 EXTRA CLOCKS 1 t COLOFF 1.5V AC OPERATING CHARACTERISTICS ...
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... AC OPERATING CHARACTERISTICS TXE TPRX+ TPRX- t COL FIGURE 5-9. COLLISION TIMING (TP) TXE COL FIGURE 5-10. SQE TEST TIMING COLON t t SQED SQEON 83C694D t COLOFF 25 ...
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... LBK t LBS TXE FIGURE 5-11. LOOPBACK TIMING TTL/MOS OUTPUTS TX TX Ohm + 1% and Ohm + inductor is used for test purposes. 100 Engineering 64103) are recommended for application use. 237 Ohm TPX2+ 59 Ohm TPX1+ 59 Ohm TPX1- 237 Ohm TPX2- ...
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... PACKAGE DESCRIPTION 6.0 PACKAGE DESCRIPTION Figure 6-1 illustrates the 44-pin PLCC package for the 83C694D. Refer to Table 6-1 for the dimensions given in this figure. FIGURE 6-1. 44-PIN PLCC PACKAGE DIAGRAM 83C694D 27 ...
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Table 6-1 provides acceptable ranges for the codes shown in Figure 6-1. All dimensions are in inches. Code D/E D1/E1 D2/E2 D3/ TABLE 6-1. PLCC PACKAGE DIMENSIONS Notes: 1. ...
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... Mode select 1, 13 Mode select 2, 13 MODE1, 13 MODE2 Negative supply, 11 NRZ data conversion Oscillator, 4 OSR, 13 Output tristate, 8 83C694D P Phase-locked loop PLCC/PQFP package, 9 PLL filter cap, 13 Positive supply, 14 Prevention of voltage fluctuation, 5 Pulse widths transmitted Receive clock, 10 Receive data, 10 ...
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... Twisted-pair receive, 15 Twisted-pair transmit TX-/TX+, 13 TXC, 12 TXD, 12 TXE, 12 Typical TPX pin values UTP VCC, 14 VCO bias resistor X1, 12 X2O, 12 XLED Zener diode 5-volt supply Index ...