83C694 ETC, 83C694 Datasheet - Page 10

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83C694

Manufacturer Part Number
83C694
Description
TWISTED PAIR INTERFACE AND MACHESTER ENCODER/DECODER
Manufacturer
ETC
Datasheet

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ARCHITECTURE
The signal received from the unshielded cable can
be noisy, so minimum voltage and timing limits must
be met before the receiver logic is enabled. A
"smart squelch"
tion to the analog squelch circuit in the receiver.
The smart squelch circuit provides extra protection
against false collisions and false link connections.
If the input polarity is reversed, it will be automat-
ically detected and corrected. When this happens,
the TPOL output pin will go high to signal the
controller or to turn off the polarity indicator LED.
The phase-locked loop and Manchester decoder
are the same circuits used by the AUI receiver.
TPX2+
TPX1+
TPX1-
TPX2-
TP+
TP-
©
Twisted Pair
FIGURE 2-6. TWISTED-PAIR TRANSMIT PATH AND TIMING
digital noise filter is used in addi-
Cable
FIGURE 2-5. TWISTED-PAIR RECEIVE PATH
TPX+
TPX-
100 nsec
Common Mode
Choke
Transmit
Filter
An external interface circuit for TPR+ and TPR-
might be designed like Figure 2-5.
2.7
When the loopback input goes high it causes the
83C694D to send serial data from the transmit data
input through the encoder, and back through the
phase-locked loop and decoder to the receive data
output. The transmit driver is in the idle state during
loopback mode and the receiver circuitry and colli-
sion detection are disabled. Loopback can be en-
abled during either AUI or TP (10BaseT) operation.
Transmit data is always looped back during TP
operation, simulating the physical broadcast char-
acteristic of 802.3 coaxial cable networks.
Transformer
Transformer
Isolation
Isolation
LOOPBACK FUNCTION
50 nsec
Common Mode
Choke
Receive
Filter
Twisted Pair
Cable
TPR-
TPR+
83C694D
7

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