DSP56300 Motorola Inc, DSP56300 Datasheet - Page 17

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DSP56300

Manufacturer Part Number
DSP56300
Description
DSP56301 Digital Signal Processor
Manufacturer
Motorola Inc
Datasheet
Errata
Number
ED37
ED38
DSP56301 Errata
 1996-2002, Motorola
Document Update
Description (added 4/19/99):
In paragraph 6.1.1.11 on page 6-12 of the 301 User’s Manual, there is an
error, as follows:
"HIRQ_ is asserted by the HI32 when a host interrupt request (recieve
and/or transmit) is generated in the HI32"
Workaround/correction:
Should be:
"HIRQ_ is asserted by the HI32 when a host interrupt request (receive
and/or transmit) is generated in the HI32 (as described in paragraphs
6.2.1.1, 6.2.1.1 and 6.2.1.4)."
Description (added 7/14/99):
If Port A is used for external accesses, the BAT bits in the AAR3-0
registers must be initialized to the SRAM access type (i.e. BAT = 01)
or to the DRAM access type (i.e. BAT = 10). To ensure proper
operation of Port A, this initialization must occur even for an AAR
register that is not used during any Port A access. Note that at reset,
the BAT bits are initialized to 00.
Pertains to: DSP56300 Family Manual, Port A Chapter (Chapter
9 in Revision 2), description of the BAT[1 –0] bits in the AAR3 -
AAR0 registers. Also pertains to the core chapter in device-specific
user’s manuals that include a description of the AAR3 - AAR0
registers with bit definitions (usually Chapter 4).
Freescale Semiconductor, Inc.
DSP56301 Digital Signal Processor
For More Information On This Product,
301CE2K30A_0_8
Go to: www.freescale.com
Mask:2K30A
Chip Errata
ng 12/19/02 pg. 17
Applies
to Mask
2K30A
2K30A

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