DSP56371D Motorola Inc, DSP56371D Datasheet - Page 19
![no-image](/images/no-image-200.jpg)
DSP56371D
Manufacturer Part Number
DSP56371D
Description
high density CMOS device
Manufacturer
Motorola Inc
Datasheet
1.DSP56371D.pdf
(102 pages)
- Current page: 19 of 102
- Download datasheet (2Mb)
12.0
MOTOROLA
No.
62
63
64
65
66
67
68
69
70
71
72
73
74
75
Clock cycle
Clock high period
Clock low period
SCKR rising edge to FSR out (bl) high
SCKR rising edge to FSR out (bl) low
SCKR rising edge to FSR out (wr) high
SCKR rising edge to FSR out (wr) low
SCKR rising edge to FSR out (wl) high
SCKR rising edge to FSR out (wl) low
Data in setup time before SCKR (SCK
in synchronous mode) falling edge
Data in hold time after SCKR falling
edge
FSR input (bl, wr) high before SCKR
falling edge
FSR input (wl) high before SCKR falling
edge
FSR input hold time after SCKR falling
edge
•
•
•
•
Enhanced Serial Audio Interface Timing
Characteristics
For internal clock
For external clock
For internal clock
For external clock
5
6
Table 9 Enhanced Serial Audio Interface Timing
Freescale Semiconductor, Inc.
For More Information On This Product,
1, 2, 3
DSP56371 Technical Data
Go to: www.freescale.com
6
6
Symbol
t
SSICC
—
—
—
—
—
—
—
—
—
—
—
—
—
SCKT:max[(3*T
Expression
2 × T c − 10.0
2 × T c − 10.0
) or t87]
Enhanced Serial Audio Interface Timing
4 × T c
4 × T c
2 × T c
2 × T c
—
—
—
—
—
—
—
—
—
—
—
3
C
Min
22.3
22.3
26.5
10.0
10.0
19.0
23.0
23.0
3.4
3.4
0.0
5.0
3.0
1.0
1.0
3.0
0.0
—
—
—
—
—
—
—
—
—
—
—
—
Max
37.0
22.0
37.0
22.0
39.0
24.0
39.0
24.0
36.0
21.0
37.0
22.0
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Condition
i ck a
i ck a
i ck a
i ck a
i ck a
i ck a
i ck a
i ck a
i ck a
x ck
x ck
x ck
x ck
x ck
x ck
x ck
x ck
x ck
x ck
x ck
x ck
x ck
i ck
i ck
i ck
4
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
19
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