DSP56371D Motorola Inc, DSP56371D Datasheet - Page 6

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DSP56371D

Manufacturer Part Number
DSP56371D
Description
high density CMOS device
Manufacturer
Motorola Inc
Datasheet
External Clock Operation
8.0
The DSP56371 system clock is an externally supplied square wave voltage source connected to EXTAL
(see
6
Note:
No.
6
7
8
9
Figure
Note:
EXTAL input high
(40% to 60% duty cycle)
EXTAL input low
(40% to 60% duty cycle)
EXTAL cycle time
Instruction cycle time= I
1.
2.
3.
4.
EXTAL
1).
External Clock Operation
Measured at 50% of the input transition
The maximum value for PLL enabled is given for minimum V
The maximum value for PLL enabled is given for minimum V
The indicated duty cycle is for the specified maximum frequency for which a part is rated. The
minimum clock high or low time required for correct operation, however, remains the same at lower
operating frequencies; therefore, when a lower clock frequency is used, the signal symmetry may vary
from the specified duty cycle as long as the minimum high time and low time requirements are met.
The midpoint is 0.5 (V
With PLL disabled
With PLL enabled
With PLL disabled
With PLL enabled
Characteristics
V
IL
Table 5 Clock Operation 150 and 181 MHz Values
1,2
2
1,2
ETH
Freescale Semiconductor, Inc.
For More Information On This Product,
CYC
6
Figure 1 E
= T
IH
8
DSP56371 Technical Data
Go to: www.freescale.com
C
+ V
3
ETL
IL
).
7
ETC
xternal Clock Timing
Symbol
.
Icyc
Eth
Etc
Etl
6.66ns
6.66ns
6.66ns
6.66ns
3.33ns
3.33ns
Min
CO
CO
150 MHz
Midpoint
and maximum MF.
and maximum DF.
13.0ns
200ns
100ns
100ns
Max
inf
inf
V
IH
2.75ns
2.75ns
5.52ns
5.52ns
5.52ns
5.52ns
Min
181 MHz
MOTOROLA
13.0ns
100ns
100ns
200ns
Max
inf
inf

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