LM3S328 Luminary Micro, Inc., LM3S328 Datasheet - Page 13

• Manufacturer Part Number: LM3S328
• Description: Microcontroller
• Manufacturer: Luminary Micro, Inc.

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Synchronous Serial Interface (SSI) ............................................................................................. 262
Register 1:
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Inter-Integrated Circuit (I2C) Interface ........................................................................................ 297
Register 1:
Register 2:
October 8, 2006
UART Receive Status/Error Clear (UARTRSR/UARTECR), offset 0x004 .............................. 235
UART Flag (UARTFR), offset 0x018 ....................................................................................... 237
UART Integer Baud-Rate Divisor (UARTIBRD), offset 0x024 ................................................. 239
UART Fractional Baud-Rate Divisor (UARTFBRD), offset 0x028 ........................................... 240
UART Line Control (UARTLCRH), offset 0x02C ..................................................................... 241
UART Control (UARTCTL), offset 0x030................................................................................. 243
UART Interrupt FIFO Level Select (UARTIFLS), offset 0x034 ................................................ 244
UART Interrupt Mask (UARTIM), offset 0x038 ........................................................................ 245
UART Raw Interrupt Status (UARTRIS), offset 0x03C............................................................ 247
UART Masked Interrupt Status (UARTMIS), offset 0x040 ...................................................... 248
UART Interrupt Clear (UARTICR), offset 0x044...................................................................... 249
UART Peripheral Identification 4 (UARTPeriphID4), offset 0xFD0.......................................... 250
UART Peripheral Identification 5 (UARTPeriphID5), offset 0xFD4.......................................... 251
UART Peripheral Identification 6 (UARTPeriphID6), offset 0xFD8.......................................... 252
UART Peripheral Identification 7 (UARTPeriphID7), offset 0xFDC ......................................... 253
UART Peripheral Identification 0 (UARTPeriphID0), offset 0xFE0.......................................... 254
UART Peripheral Identification 1 (UARTPeriphID1), offset 0xFE4.......................................... 255
UART Peripheral Identification 2 (UARTPeriphID2), offset 0xFE8.......................................... 256
UART Peripheral Identification 3 (UARTPeriphID3), offset 0xFEC ......................................... 257
UART PrimeCell Identification 0 (UARTPCellID0), offset 0xFF0............................................. 258
UART PrimeCell Identification 1 (UARTPCellID1), offset 0xFF4............................................. 259
UART PrimeCell Identification 2 (UARTPCellID2), offset 0xFF8............................................. 260
UART PrimeCell Identification 3 (UARTPCellID3), offset 0xFFC ............................................ 261
SSI Control 0 (SSICR0), offset 0x000 ..................................................................................... 274
SSI Control 1 (SSICR1), offset 0x004 ..................................................................................... 276
SSI Data (SSIDR), offset 0x008 .............................................................................................. 278
SSI Status (SSISR), offset 0x00C ........................................................................................... 279
SSI Clock Prescale (SSICPSR), offset 0x010 ......................................................................... 280
SSI Interrupt Mask (SSIIM), offset 0x014 ................................................................................ 281
SSI Raw Interrupt Status (SSIRIS), offset 0x018 .................................................................... 282
SSI Masked Interrupt Status (SSIMIS), offset 0x01C.............................................................. 283
SSI Interrupt Clear (SSIICR), offset 0x020.............................................................................. 284
SSI Peripheral Identification 4 (SSIPeriphID4), offset 0xFD0.................................................. 285
SSI Peripheral Identification 5 (SSIPeriphID5), offset 0xFD4.................................................. 286
SSI Peripheral Identification 6 (SSIPeriphID6), offset 0xFD8.................................................. 287
SSI Peripheral Identification 7 (SSIPeriphID7), offset 0xFDC ................................................. 288
SSI Peripheral Identification 0 (SSIPeriphID0), offset 0xFE0.................................................. 289
SSI Peripheral Identification 1 (SSIPeriphID1), offset 0xFE4.................................................. 290
SSI Peripheral Identification 2 (SSIPeriphID2), offset 0xFE8.................................................. 291
SSI Peripheral Identification 3 (SSIPeriphID3), offset 0xFEC ................................................. 292
SSI PrimeCell Identification 0 (SSIPCellID0), offset 0xFF0..................................................... 293
SSI PrimeCell Identification 1 (SSIPCellID1), offset 0xFF4..................................................... 294
SSI PrimeCell Identification 2 (SSIPCellID2), offset 0xFF8..................................................... 295
SSI PrimeCell Identification 3 (SSIPCellID3), offset 0xFFC .................................................... 296
I2C Master Slave Address (I2CMSA), offset 0x000 ................................................................ 308
I2C Master Control/Status (I2CMCS), offset 0x004................................................................. 309
Preliminary
LM3S328 Data Sheet
13