DS2482-100 Dallas Semiconducotr, DS2482-100 Datasheet - Page 13

• Manufacturer Part Number: DS2482-100
• Description: Single-Channel 1-Wire Master
• Manufacturer: Dallas Semiconducotr

1-Wire Read Byte
1-Wire Triplet
Bit Allocation in the Direction Byte
Command Code
Command Parameter
Description
Typical Use
Restriction
Error Response
Command Duration
1-Wire Activity
Read Pointer Position
Status Bits Affected
Configuration Bits Affected
Command Code
Command Parameter
Description
Typical Use
Restriction
Error Response
Command Duration
1-Wire Activity
Read Pointer Position
Status Bits Affected
Configuration Bits Affected
bit 7
V
bit 6
x
bit 5
x
bit 4
x
96h
None
Generates eight read-data time slots on the 1-Wire line and stores result
in the Read Data register.
To read data from the 1-Wire line; equivalent to executing eight 1-Wire
Single Bit commands with V = 1 (write-1 time slot), but faster due to less
I²C traffic.
1-Wire activity must have ended before the DS2482 can process this
command.
Command code is not acknowledged if 1WB = 1 at the time the command
code is received and the command is ignored.
8 × t
command code acknowledge bit.
Begins maximum 262.5ns after the falling SCL edge of the command
code acknowledge bit.
Status register (for busy polling)
NOTE: To read the data byte received from the 1-Wire line, issue the Set
Read Pointer command and select the Read Data register. Then access
the DS2482 in read mode.
1WB (set to 1 for 8 × t
1WS, APU apply
78h
Direction Byte
Generates three times slots, two read time slots and one write time slot at
the 1-Wire line. The type of write time slot depends on the result of the
read time slots and the direction byte.
The direction byte determines the type of write time slot if both read time
slots are 0 (a typical case). In this case the DS2482 generates a write 1-
time slot if V = 1 and a write-0 time slot if V = 0.
If the read time slots are 0 and 1, there follows a write-0 time slot.
If the read time slots are 1 and 0, there follows a write-1 time slot.
If the read time slots are both 1 (error case), the subsequent write time
slot is a write 1.
To perform a 1-Wire Search ROM sequence; a full sequence requires this
command to be executed 64 times to identify and address one device.
1-Wire activity must have ended before the DS2482 can process this
command.
Command code and direction byte is not acknowledged if 1WB = 1 at the
time the command code is received and the command will be ignored.
3 × t
first bit (MS bit) of the direction byte.
Begins maximum 262.5ns after the falling SCL edge of the MS bit of the
direction byte.
Status register (for busy polling)
1WB (set to 1 for 3 × t
SBR is updated at the first t
TSB and DIR are updated at the second t
1WS, APU apply
bit 3
x
SLOT
SLOT
bit 2
+ maximum 262.5ns, counted from the falling SCL edge of the
+ maximum 262.5ns, counted from the falling SCL edge of the
x
bit 1
13 of 21
x
SLOT
SLOT
bit 0
)
)
x
MSR
x = don’t care
MSR
(i. e., at t
SLOT
+ t
MSR
)