AN2072 Freescale Semiconductor / Motorola, AN2072 Datasheet - Page 14

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AN2072

Manufacturer Part Number
AN2072
Description
AN2072, Decision Feedback Equalizer for StarCore-Based DSPs
Manufacturer
Freescale Semiconductor / Motorola
Datasheet
Implementation of the Algorithm
At the exit from this routine all the addressing modes are set back to linear. In this matrix multiply block 1/SNR
(SNR in linear scale) is also added to all the diagonal elements of the output matrix, mult_out. This block
completes the generation of the matrix expressed in Equation 25.
3.4 Cholesky Factorization and Back Substitution
Cholesky factorization is the core routine for computing the DFE coefficient. This routine computes the Cholesky
factorization of the matrix illustrated in Figure 3 on page 9. The input to the routine is A = H × H + (1/SNR_lin)I
and the output of the routine is the feed forward and feedback filter taps.
14
NN_loop:
P_loop:
N_loop:
loopstart2
loopstart0
doen1 #COL_CONV_MATRIX
loopstart1
[ doen2 #ROW_CONV_MATRIX_over2
clr d9
clr d11
]
move.4f (r0)+,d0:d1:d2:d3
loopend2
[ asrr #CONV_MATRIX_SCALE,d12asrr #CONV_MATRIX_SCALE,d13
]
[ rnd d12,d12rnd d13,d13
suba #8,r1
]
[ moves.2f d12:d13,(r3)+
clr d8
clr d10
]
loopend1
move #conv_matrix,r1
tfra r4,r0
suba #8,r0
loopend0
Decision Feedback Equalizer for StarCore™-Based DSPs, Rev. 1
H
×
H
+
clr d8
clr d10
move.4f (r1)+,d4:d5:d6:d7; load real/imag of
·
·
·
clr d9
clr d11
adda #ROW_CONV_MATRIX_4X,r4,r4; r1->#conv_matrix
tfra r4,r8
---------- - I
SNR
1
; loop1 repeat # of col in
; conv_matrix
; loop2 repeat # of row/2, d8=0
; d9=0, d10=0, d11=0
; transpose(H) and H
; round entries before storing
; back up r1 by 8
; write results to memory
; scale the multiply
; output
; back up r0 by 8
; r4->r4+32
; r0->r4 and r8
Freescale Semiconductor
Equation 25

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