AN2148 Motorola / Freescale Semiconductor, AN2148 Datasheet - Page 6

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AN2148

Manufacturer Part Number
AN2148
Description
Design Considerations for Interfacing SDRAM with MC68VZ328
Manufacturer
Motorola / Freescale Semiconductor
Datasheet
Physical Interface Between SDRAM and MC68VZ328
2
Recommended pin connections between the Dragon Ball VZ to SDRAM are shown below:
The above configuration was taken from the DragonBall VZ Application Development System which
provides for two (2) 64 Mbit SDRAM (4 M x 16-bit).
Each Chip-Select line can address up to 16 Mbytes of memory. Chip-select D0 can be configured to use
the address space of Chip-Select D1 for a total address space of 32MByte. See section 3.1.2 for details on
using 32MByte SDRAM.
2.1
One of the trickier steps in connecting the SDRAM are the address lines. Of particular importance is
address line PM4/SDA10 which should always be connected to A10 on the SDRAM chip to ensure proper
SDRAM operation.
6
MC68VZ328
Physical Interface Between SDRAM and
MC68VZ328
Address Lines
SDA10 can be kept high during precharge command to tell the SDRAM to
indicate precharge all bank
Design Considerations for Interfacing SDRAM with MC68VZ328
PB2/CSC0/RAS0/SDRAS
PB5/CSD1/CAS1/SDCS1
PB3/CSC1/RAS1/SDCAS
PB4/CSD0/CAS0/SDCS0
PB1/CSB1/SDWE
Figure 1. Pin Connection from VZ to SDRAM
PM4/SDA10
PM0/SDCLK
PM2/DQMH
PM3/DQML
PM1/SDCE
A[1:10]
D[0:15]
NOTE: SDA10 & SDRAM Precharge
A12
A13
A14
Pre-Publication Draft
VCC
VCC
D[0:15]
CLK
UDQM
A[0:9]
A11
CKE
RAS
CAS
LDQM
WE
A10
BS0
BS1
CS
64 Mbit (4Meg x 16-Bit) SDRAM
CS
64 Mbit (4Meg x 16-Bit) SDRAM
SDRAM0
SDRAM1

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