CY28347 Cypress Semiconductor, CY28347 Datasheet - Page 20

• Manufacturer Part Number: CY28347
• Description: Universal Single-chip Clock Solution
• Manufacturer: Cypress Semiconductor

Document #: 38-07352 Rev. *C
Ordering Information
Note:
26. This timing diagram shows that VTT_PWRGD# transits to a logic LOW in the first time at power up. After the first HIGH to LOW transition of VTT_PWRGD#,
CY28347OC
CY28347OCT
CY28347ZC
CY28347ZCT
device is not affected, VTT_PWRGD# is ignored.
Part Number
VDD Clock Gen
VTT_PWRGD#
Clock Outputs
Clock State
Clock VCO
VID (0:3),
SEL (0,1)
PWRGD
Figure 18. Clock Generator Power-up/Run State Diagram (with P4 Processor SELP4_K7# = 1)
Figure 17. VTT_PWGD# Timing Diagram (With Advanced PIII Processor SELP4_K7# = 1)
56-pin Shrunk Small Outline Package (SSOP)
56-pin Shrunk Small Outline Package (SSOP) – Tape and Reel
56-pin Thin Shrunk Small Outline package (TSSOP)
56-pin Thin Shrunk Small Outline package (TSSOP) – Tape and Reel
State 0
Off
Off
D e la y 0 .2 5 m S
P o w e r O ff
S 1
S 0
0.2-0.3mS
V D D A = 2 .0 V
State 1
Delay
Package Type
VTT_GD#
Wait for
On
V D D 3 .3 = O ff
S a m p le
F S ( 3 :0 )
In p u ts
S 2
Sample Sels
State 2
1 .1 4 6 m s
W a it f o r
On
State 3
O p e r a tio n
O u tp u te s
N o rm a l
Commercial, 0 to 70 C
Commercial, 0 to 70 C
Commercial, 0 to 70 C
Commercial, 0 to 70 C
E n a b le
S 3
(Note A)
Product Flow
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CY28347
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