CY28347 Cypress Semiconductor, CY28347 Datasheet - Page 5

• Manufacturer Part Number: CY28347
• Description: Universal Single-chip Clock Solution
• Manufacturer: Cypress Semiconductor

Document #: 38-07352 Rev. *C
Table 6. Byte Read and Byte Write Protocol (continued)
Byte 0: Frequency Select Register
Byte 1: CPU Clocks Register
Byte 2: PCI Clock Register
Bit
7
6
5
20:27
11:18
Bit
Bit
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
10
19
28
29
@Pup
Command Code - 8 bits “1xxxxxxx” stands for byte
operation bit[6:0] of the command code represents
H/W Setting
H/W Setting
H/W Setting
H/W Setting
H/W Setting
H/W Setting
@Pup
0
1
1
0
1
1
1
1
1
0
1
@Pup
0
0
the offset of the byte to be accessed
Data Byte from Master – 8 Bits
Acknowledge from slave
Acknowledge from slave
Acknowledge from slave
48,49
53,52
53,52
Pin#
Pin#
11
10
Pin#
21
10
20
11
1
7
Stop
SSMODE
SSCG
SST1
SST0
CPUCS_T/C_ EN#
CPUOD_T/C_EN#
CPUT/C_PD_CNTRL
MULT0
SELP4_K7#
PCI_DRV
Reserved
Name
PCI_F
Name
Name
FS2
FS1
FS0
FS3
Reserved.
For Selecting Frequencies see Table 1.
For Selecting Frequencies see Table 1.
For Selecting Frequencies see Table 1.
If this bit is programmed to “1,” it enables WRITES to bits (6:4,1) for
selecting the frequency via software (SMBus)
If this bit is programmed to a “0” it enables only READS of bits
(6:4,1), which reflect the hardware setting of FS(0:3).
Reserved
For Selecting frequencies in Table 1.
Only for reading the hardware setting of the CPU interface mode,
status of SELP4_K7# strapping.
PCI clock output drive strength 0 = Normal, 1 = increase the drive
strength 20%.
1 = output enabled (running). 0 = output disabled asynchronously
in a LOW state.
Reserved, set = 1.
Only For reading the hardware setting of the Pin11 MULT0 value.
0 = Down Spread. 1 = Center Spread. See Table 9.
1 = Enable (default). 0 = Disable
Select spread bandwidth. See Table 9.
Select spread bandwidth. See Table 9.
1 = output enabled (running). 0 = output disabled asynchronously
in a LOW state.
1 = output enabled (running). 0 = output disable asynchronously
in a LOW state.
In K7 mode, this bit is ignored. In P4 mode, when PD# asserted
LOW, 0 = drive CPUT to 2xIref and CPUC LOW and
1 = three-state CPUT and CPUC.
21:27
30:37
11:18
10
19
20
28
29
38
39
Command Code - 8 bits “1xxxxxxx” stands for byte
operation bit[6:0] of the command code represents
the offset of the byte to be accessed
Description
Data byte from slave - 8 bits
Description
Description
Acknowledge from slave
Acknowledge from slave
Acknowledge from slave
Slave address - 7 bits
Not Acknowledge
Repeat start
Read
Stop
CY28347
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