AN2184 Freescale Semiconductor / Motorola, AN2184 Datasheet - Page 6

• Manufacturer Part Number: AN2184
• Description: MCF5272 Interrupt Service Routine for the Physical Layer Interface Controller
• Manufacturer: Freescale Semiconductor / Motorola

3.2 Monitor Channel Operation
This feature is available only in GCI mode. The monitor channel is used to access the internal registers of
any GCI device in order to support maintenance channel operations. All monitor channel messages are two
bytes in length. Each byte is sent twice to permit the receiving GCI device to verify data integrity. In ISDN
applications, the monitor channel is used for access to the maintenance messages. The A and E bits in the
GCI channel are used to control and acknowledge monitor channel transfers between the MCF5272 and
another GCI device.
Figure 4 shows the monitor channel protocol used. When the monitor channel is inactive, the A and E bits
are both high. The A and E bits are active when they are driven low during their respective bit times. (Note
that pull-up resistors are required on Din and Dout.) The E bit represents the transmission of a new monitor
channel byte. The A bit from the opposite direction is used to acknowledge the monitor channel byte
transfer. An idle monitor channel is indicated by both A and E bits being inactive for two GCI frames. The
monitor channel data is 0xFF when inactive. The originating GCI device transmits a byte onto the monitor
channel after receiving the A and E bits equal to 1 for at least two consecutive GCI frames. The originating
GCI device also clears its outgoing E bit in the same GCI frame as the byte that is transmitted. The
transmitted byte is repeated for at least two GCI frames, or is repeated in subsequent GCI frames, until the
MCF5272 acknowledges receiving two consecutive GCI frames containing the same monitor byte.
Once the MCF5272 acknowledges the first byte, the sending device sets E high and transmits the first
frame of the second byte. Then, the second byte is repeated with the E bit low until it is acknowledged. The
destination GCI device verifies that it has received the first byte by clearing the A bit towards the
originating GCI device for at least two GCI frames. Successive bytes are acknowledged by the receiving
device setting A high on the first instance of the next byte, followed by A being cleared when the second
instance of the byte is received. If the receiving GCI device does not receive the same monitor channel byte
in two consecutive GCI frames, it indicates this by leaving A = 0 until two consecutive identical bytes are
received. The last byte of the sequence is indicated by the originating GCI device when it sets its E bit for
two successive GCI frames. The procedure is summarized in Figure 4.
General Circuit Interface Mode of Operation Monitor Channel Operation
6
Frame Sync (FSC)
Data C lock (DCL)
Data In (Din)
Data Out (Dout)
Din
E bit
Dout
A bit
FSC
125us
125 µs
NULL
B1 Channel
Freescale Semiconductor, Inc.
BYTE1
For More Information On This Product,
Figure 4. Monitor Channel Protocol
MCF5272 Interrupt Service Routine
Go to: www.freescale.com
BYTE1
Figure 3. GCI Frame
B2 Channel Monitor Chann
BYTE 2
BYTE 2
el
NULL
D Channel CI
NULL
A/E
NULL