CY2DP1510 Cypress Semiconductor, CY2DP1510 Datasheet - Page 4

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CY2DP1510

Manufacturer Part Number
CY2DP1510
Description
1:10 LVPECL Fanout Buffer
Manufacturer
Cypress Semiconductor
Datasheet

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Absolute Maximum Ratings
Operating Conditions
V
V
V
T
ESD
L
UL–94
MSL
V
T
t
Note
Document Number: 001-55566 Rev. *G
PU
2. The voltage on any I/O pin cannot exceed the power pin during power up. Power supply sequencing is not required.
U
A
DD
IN
OUT
S
DD
[2]
Parameter
Parameter
HBM
[2]
Supply voltage
Input voltage, relative to V
DC output or I/O voltage, relative to V
Storage temperature
Electrostatic discharge (ESD) protection
(Human body model)
Latch up
Flammability rating
Moisture sensitivity level
Supply voltage
Ambient operating temperature
Power ramp time
Description
Description
SS
SS
Nonfunctional
Nonfunctional
Nonfunctional
Nonfunctional
JEDEC STD 22-A114-B
At 1/8 in
2.5-V supply
3.3-V supply
Commercial
Industrial
Power-up time for V
minimum specified voltage (power
ramp must be monotonic).
Condition
Condition
DD
to reach
Meets or exceeds JEDEC Spec
2.375
3.135
2000
–0.5
–0.5
–0.5
JESD78B IC latch up test
0.05
Min
–55
Min
–40
0
or V
or V
lesser of 4.0
lesser of 4.0
CY2DP1510
V – 0
2.625
3.465
Max
3
Max
150
500
DD
DD
4.6
70
85
+ 0.4
+ 0.4
Page 4 of 13
Unit
Unit
ms
°C
°C
°C
V
V
V
V
V
V
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