AN2400 Freescale Semiconductor / Motorola, AN2400 Datasheet - Page 2

• Manufacturer Part Number: AN2400
• Description: HCS12 NVM Guidelines
• Manufacturer: Freescale Semiconductor / Motorola

AN2400/D
Split-Gate Flash Memory
Split-Gate Flash
Memory Structure
2
The reader should refer to the relevant Flash (or EEPROM) Block User Guide
for complete details of all Flash/EEPROM registers. The reader should also
refer to the relevant microcontroller User Guide for current Flash/EEPROM
electrical specifications, particularly data retention, write-erase cycles and
erase/programming timings.
The author gratefully acknowledges the contributions provided by many
colleagues, in particular Derek Beattie, Ally Gorman and Andy Birnie.
HCS12 microcontrollers incorporate advanced, 0.25µm non-volatile memory
technology called Split-Gate Flash (SGF). The same basic technology is used
for both Flash and EEPROM on HCS12 microcontrollers.
The Flash memory is organised in a basic grid of rows and columns. At the
intersection of each row and column is a split-gate transistor, which has both a
control gate and a floating gate, as depicted in
Transistor. The floating gate is electrically insulated from both the control gate
and the drain-source channel. However, capacitive coupling causes the
floating gate both to influence and be influenced by the potential at the source.
Each split-gate transistor corresponds to one bit of Flash memory, called a
bitcell. Sixteen bitcells are grouped together to form each word.
illustrates one quarter of a word. Control logic decodes each CPU address to
select the appropriate Flash cells to be read or written, and applies the required
voltages on the drain, source and control gate to read, program or erase each
cell.
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
HCS12 NVM Guidelines
Figure 1. Split-Gate Flash Transistor
Control
Gate
Floating
Gate
S
D
Figure 1. Split-Gate Flash
Figure 2
MOTOROLA