AN2400 Freescale Semiconductor / Motorola, AN2400 Datasheet - Page 4

• Manufacturer Part Number: AN2400
• Description: HCS12 NVM Guidelines
• Manufacturer: Freescale Semiconductor / Motorola

AN2400/D
NVM Programming
and Erasure
4
To erase the Flash, the sources and bitlines are connected to VSS (0V) and a
high positive voltage (>>VDD) is applied to the control gate through the
wordline, as illustrated in
floating gate and the control gate. This causes Fowler-Nordheim tunnelling of
electrons from the floating gate to the control gate, leaving the floating gate with
a net positive charge. This is a slow process, requiring up to 20ms to erase a
sector.
Programming and erasure of Flash and EEPROM memory is controlled by a
command state machine. The command state machine supervises the writing
sequence of all commands and verifies the validity of the command sequence.
The state machine is also responsible for applying the appropriate voltages to
the Flash block for the required length of time. The state machine requires a
timebase between 150kHz and 200kHz that is derived from the microcontroller
oscillator clock by means of a programmable prescaler. Valid commands are
listed in
or EEPROM Status register indicate any errors. No commands can be
executed unless all error flags are cleared (in all blocks).
All the voltages required for programming and erasure are generated by on-
chip charge-pumps. Each separate NVM block has an independent command
Freescale Semiconductor, Inc.
For More Information On This Product,
Table 2. Valid Flash/EEPROM
Figure 4. Reading a ‘0101’ pattern in Split-Gate Flash
>>VDD
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Figure 5. Erasing a nibble of Split-Gate Flash
HCS12 NVM Guidelines
VDD
VSS
VSS
Figure
VSS
5. A high electric field is created between the
VSS
Commands. Error flags in the Flash
VSS
VSS
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