AN2505 Freescale Semiconductor / Motorola, AN2505 Datasheet - Page 13

no-image

AN2505

Manufacturer Part Number
AN2505
Description
MSC8102 Asynchronous DSI Throughput
Manufacturer
Freescale Semiconductor / Motorola
Datasheet
5.4 Host DMA Write Versus Local Bus Frequency
Figure 14 illustrates the DSI throughput for a host DMA write transaction versus the local bus frequency of the
MSC8102. This chart illustrates that the observed maximum throughput occurs when the local bus frequency is 70
MHz or higher. Notice that at 20 MHz, the host DMA write is about the same for a single write transaction. This is
exactly what happened with the host DMA read transaction. The reduction in MSC8102 local bus frequency affects
the advantages that the MSC8101 DMA controller gains over the single write transactions. However, the DMA
controller is still preferable since it does not stall the MSC8101 core as a normal move instruction does. Also, the
host DMA write throughput at 20 MHZ is less than the host DMA read throughput at 20 MHz. This is contrary to
what the 70 MHz data suggested, in which the throughput of the host DMA write dominated the host DMA read.
The host DMA write performance numbers decrease at a faster rate than the host DMA read performance numbers.
this characteristic is also seen with the single read and write data discussed in Section 5.1 and Section 5.2.
Freescale Semiconductor








Figure 13. DSI Host DMA Read Throughput Versus MSC8102 Local Bus Frequency


MSC8102 Asynchronous DSI Throughput, Rev. 1

8102 Local Bus Frequency (MHz)



Actual Throughput Versus Frequency



13

Related parts for AN2505