AN2681 Freescale Semiconductor / Motorola, AN2681 Datasheet - Page 5

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AN2681

Manufacturer Part Number
AN2681
Description
1-Wire Interface on the i.MX21 Application Processor
Manufacturer
Freescale Semiconductor / Motorola
Datasheet
2.2 TIME_DIVIDER Register
The TIME_DIVIDER register divides the peripheral clock, ipg_clock, to generate the internal clock to the
1-Wire module.
The value in the register must be such that IPG_CLOCK / (TIME_DIVIDER+1) • 1 MHz
2.3 RESET Register
The RESET register resets the 1-Wire state machine. Resetting the state machine aborts any transaction
that is currently taking place, and reverts the bus to logic high.
MOTOROLA
Bits 15-8
Bits 15-1
Bits 7-0
Name
Name
dvdr
RST
Bit 0
Predivider Factor—This field is used to
set the clock divider setting to control the
frequency of the generated clock.
Software Reset—The reset register is
used to reset the module through software.
Table 3.
Freescale Semiconductor, Inc.
For More Information On This Product,
Table 4.
Reserved bits
Reserved bits
Description
Description
MC9328MX21 Application Note
Go to: www.freescale.com
TIME_DIVIDER Register Description
RESET Register Description
0 = Divider value is 1 (default).
1 = Divider value is 2.
FF = Divider value is 256.
0 = 1-Wire is not reset.
1 = 1-Wire is reset.
i.MX21 1-Wire Hardware Interface
Settings
Settings
N/A
N/A
5

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