EM6520 EM Microelectronic, EM6520 Datasheet - Page 31

• Manufacturer Part Number: EM6520
• Description: MFP version of EM6620 Ultra Low Power Microcontroller 4x8 LCD Driver
• Manufacturer: EM Microelectronic

9
The EM6520 has 12 different interrupt request sources individually maskable. These are:
External(5)
Internal(8)
The SVLD and the Compare share the same interrupt line.
To be able to send an interrupt to the CPU, at least one of the interrupt request flags must be set ( IRQxx ) and
the general interrupt enable bit IntEn located in the register RegSysCntl1 must be set to 1. The interrupt request
flags can only be set by a positive edge of IRQxx with the corresponding mask register bit ( MaskIRQxx ) set to
1.
At power on or after any reset all interrupt request mask registers are cleared and therefore do not allow any
interrupt request to be stored. Also the general interrupt enable IntEn is set to 0 (No IRQ to CPU) by reset.
After each read operation on the interrupt request registers RegIRQ1 , RegIRQ2 or RegIRQ3 the contents of the
addressed register are reset. Therefore one has to make a copy of the interrupt request register if there was
more than one interrupt to treat. Each interrupt request flag may also be reset individually by writing 1 into it
(ClrIntBit).
Interrupt handling priority must be resolved through software by deciding which register and which flag inside the
register need to be serviced first.
Since the CPU has only one interrupt subroutine and because the IRQxx registers are cleared after reading, the
CPU does not miss any interrupt request which comes during the interrupt service routine. If any occurs during
this time a new interrupt will be generated as soon as the software comes out of the current interrupt subroutine.
Copyright  2002, EM Microelectronic-Marin SA
Figure 22. Interrupt Controller Block Diagram
DB[n]
Write
IRQxx
Read
ClrIntBit
Reset
Interrupt Controller
One of these Blocks for each IRQ
Mask
- Port A,
- Compare
- Prescaler
- Millisecond Counter
- 10-bit Counter
- SVLD
Interrupt Request
Capture Register
PA[3] .. PA[0] inputs
PB[0] input
ck[1], Blink, 32Hz/8Hz
Count0, CountComp
End of measure
31
1/10Sec or 1Sec
DB
Write
12 Input-OR
General
INT En
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EM6520
IRQ to µP
03/02 REV. D/449