SSD1859 Solomon Systech, SSD1859 Datasheet - Page 12

• Manufacturer Part Number: SSD1859
• Description: 128 x 80 STN LCD Segment / Common 4 G/S Drive
• Manufacturer: Solomon Systech

RVSS
This pin is the ground for internal voltage regulator. It must connect to same external GND of CVSS.
CVSS
This is an analog ground pin. It must connect to GND from external supply.
VLref
This pin is the reference voltage for internal operational amplifiers. It must connect to VCI / VSS
depends on the panel loading.
VCI
Reference voltage input for internal DC-DC converter. The voltage of generated VOUT equals to the
multiple factor (2X, 3X, 4X, 5X or 6X) times VCI with respect to VSS.
Note: voltage at this input pin must be larger than or equal to VDD.
CXP, CXN
Connect an external capacitor to these pins when 6X
VOUT
This pin is the most positive LCD driving voltage. It can be supplied externally or generated by the
internal regulator.
VR
This pin is an input of the internal voltage regulator. When the internal resistors network for the voltage
regulator is disabled (INTRS is pulled low), external resistors should be connected between VSS and
VR, and VR and VOUT, respectively (Please refer to application example on page 42).
VL5, VL4, VL3 and VL2
These are LCD driving voltages. These pins should NOT be connected to any signal pins nor shorted
together. They should be left open. They have the following relationship:
VOUT > VL5 > VL4 > VL3 > VL2 > VSS
COM0 - COM79
These pins provide the row driving signal COM0 - COM79 to the LCD panel.
ICONS
This pin is the special icon line COM signal output.
SEG0 - SEG127
These pins provide the LCD column driving signal. Their voltage level is VSS during sleep mode and
standby mode.
CL
This pin is the external clock input for the device if external clock mode is selected by software
command. Under POR operation, this pin should be left opened and internal oscillator will be used after
power on reset.
Solomon Systech
VL5
VL4
VL3
VL2
1:a bias
(a-1)/a*VOUT
(a-2)/a*VOUT
2/a*VOUT
1/a*VOUT
DC-DC Converter Factor
Dec 2003
P 12/48 Rev 1.0
is set.
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SSD1859