STW81100 STMicroelectronics, STW81100 Datasheet - Page 14

• Manufacturer Part Number: STW81100
• Description: MULTI-BAND RF FREQUENCY SYNTHESIZER
• Manufacturer: STMicroelectronics

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STW81100
7.8.3 VCO Voltage Amplitude Control
The bits A0 and A1 control the voltage swing of the VCO. The following table gives the voltage level ex-
pected on the resonator nodes.
Table 9.
8
Data transmission from microprocessor to the STW81100 takes place through the 2 wires (SDA and SCL)
I
The I
reads the data as receiver. The device that controls the data transfer is known as the Master and the oth-
ers as the slave. The master will always initiate the transfer and will provide the serial clock for synchro-
nization.
8.1 General Features
8.1.1 Power ON Reset
The device at Power ON is able to configure itself to a fixed configuration, with all programmable bits set
to factory default setting.
8.1.2 Data Validity
Data changes on the SDA line must only occur when the SCL is LOW. SDA transitions while the clock is
HIGH are used to identify START or STOP condition.
Figure 17.
8.1.3 START condition
A Start condition is identified by a HIGH to LOW transition of the data bus SDA while the clock signal SCL
is stable in the HIGH state. A Start condition must precede any command for data transfer.
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2
C-BUS interface. The STW81100 is always a slave device.
I
2
2
C-bus protocol defines any device that sends data on to the bus as a transmitter and any device that
C bus interface
SDA
SDA
SCL
SCL
Code A[1:0]
00
01
10
11
DATA LINE
DATA LINE
STABLE DATA
STABLE DATA
VALID
VALID
ALLOWED
ALLOWED
CHANGE
CHANGE
DATA
DATA
Differential output voltage (Vp)
1.1
1.3
1.9
2.1