STW81100 STMicroelectronics, STW81100 Datasheet - Page 16

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STW81100

Manufacturer Part Number
STW81100
Description
MULTI-BAND RF FREQUENCY SYNTHESIZER
Manufacturer
STMicroelectronics
Datasheet

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STW81100
Table 10.
8.1.8 Multi-byte write mode
The multi-byte write mode can start from any internal address. The master sends the data bytes and each
one is acknowledged. The master terminates the transfer by generating a STOP condition.
The sub-address decides the starting byte. A multi byte with sub-address 07H and 5 DATA_IN byte would
affect the bytes starting from DATA_OUT[63:56] to DATA_OUT[31:24] and so on.
Table 11.
8.1.9 Current Byte Address Read
In the current byte address read mode, following a START condition, the master sends the device address
with the rw bit set to 1 (No sub-address is needed as there is only 1 byte read register). The STW81100
acknowledges this and outputs the data byte. The master does not acknowledge the received byte, but
terminates the transfer with a STOP condition.
Table 12.
8.2 Timing Specification
Figure 20. Data and clock
Table 13.
16/23
S
S
S
Symbol
1100A
1100A
T
T
T
T
cwh
cwl
ch
cs
1100A
2
2
A
A
1
1
2
A
A
A
0
0
1
A
0
0
0
ack
ack
SDA
SDA
0
SCL
SCL
Data to clock set up time
Data to clock hold time
Clock pulse width high
Clock pulse width low
sub-address byte
sub-address byte
ack
Parameter
t
t
cs
cs
sub-address byte
t
t
t
t
ch
ch
cwl
cwl
ack
ack
t
t
cwh
cwh
DATA IN
DATA IN
ack
ack
ack
Minimum time (ns)
....
....
DATA IN
DATA IN
DATA IN
10
2
2
5
ack
ack
ack
P
P
P

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