AD8191 Analog Devices, AD8191 Datasheet - Page 9

• Manufacturer Part Number: AD8191
• Description: 4:1 DVI/HDMI Switch with Equalization Preliminary Data Sheet (Rev. PrJ, 8/2006)
• Manufacturer: Analog Devices

Preliminary Technical Data
SERIAL INTERFACE CONFIGURATION REGISTERS
The serial interface configuration registers can be read and written using the I
significant bits of the AD8191 I
Table 5. Serial (I
Name
High-Speed
Device Modes
Auxiliary
Device
Modes
Receiver
Settings
Input Term.
Pulse 1
Input Term.
Pulse 2
Receive
Equalizer 1
Receive
Equalizer 2
Transmitter
Settings
HIGH-SPEED DEVICE MODES REGISTER
HS_EN:
Table 6. HS_EN Description
HS_SM[1:0]:
Table 7. HS_SM Description
HS_CH[3:0]:
Table 8. Quad High-speed Switch Mode Mapping
HS_EN
0b
1b
HS_SM[1:0]
00b
01b
10b
11b
HS_CH[3:0]
xx00b
xx01b
xx10b
xx11b
U
High-speed (TMDS) channels enable bit
Description
High-speed channels off, low power/standby mode
High-speed channels on
U
U
High-speed (TMDS) switching mode select bus
High-speed (TMDS) switch source select bus
Bit 7
RX_PT[15]
RX_EQ[15]
RX_PT[7]
RX_EQ[7]
O[3:0]
A[3:0]
B[3:0]
C[3:0]
D[3:0]
Description
Quad mode 4x(4:1)
Dual mode 2x(8:1)
Single mode 1x(16:1)
Illegal value, previous HS_SM[1:0] kept
2
C) Interface Register Map
Sources A and B input termination pulse-on-source-switch select (disconnect termination for a short period of time)
Sources C and D input termination pulse-on-source-switch select (disconnect termination for a short period of time)
Bit 6
High-speed
switch enable
HS_EN
Auxiliary
switch enable
AUX_EN
RX_PT[6]
RX_PT[14]
RX_EQ[6]
RX_EQ[14]
Description
High-speed source A switched to
output
High-speed source B switched to
output
High-speed source C switched to
output
High-speed source D switched to
output
2
C part address can be set with the pins I2C_ADDR2, I2C_ADDR1 and I2C_ADDR0.
Bit 5
High-speed switching mode
select
HS_SM[1]
Auxiliary switching mode
select
AUX_SM[1]
RX_PT[5]
RX_PT[13]
RX_EQ[5]
RX_EQ[13]
Sources C and D input equalization level select
Sources A and B input equalization level select
Bit 4
HS_SM[0]
AUX_SM[0]
RX_PT[4]
RX_PT[12]
RX_EQ[4]
RX_EQ[12]
Rev. PrJ | Page 9 of 29
Bit 3
HS_CH[3]
AUX_CH[3]
RX_PT[3]
RX_PT[11]
RX_EQ[3]
RX_EQ[11]
Output pre-emphasis level
select
TX_PE[1]
Table 9. Dual High-speed Switch Mode Mapping
HS_CH[3:0]
x000b
x001b
x010b
x011b
x100b
x101b
x110b
x111b
Bit 2
HS_CH[2]
AUX_CH[2]
RX_PT[2]
RX_PT[10]
RX_EQ[2]
RX_EQ[10]
TX_PE[0]
2
C serial interface, pins I2C_SDA and I2C_SCL. The least
Auxiliary switch source select
High-speed source select
Bit 1
HS_CH[1]
AUX_CH[1]
RX_PT[1]
RX_PT[9]
RX_EQ[1]
RX_EQ[9]
Output term.
on/off select
TX_PTO
O[3:2]
A1
A3
B1
B3
C1
C3
D1
D3
O[1:0]
A0
A2
B0
B2
C0
C2
D0
D2
Bit 0
HS_CH[0]
AUX_CH[0]
Input term.
on/off select
RX_TO
RX_PT [0]
RX_PT [8]
RX_EQ[0]
RX_EQ[8]
Output current
level select
TX_OCL
Description
High-speed channels A0 and
A1 switched to output
High-speed channels A2 and
A3 switched to output
High-speed channels B0 and
B1 switched to output
High-speed channels B2 and
B3 switched to output
High-speed channels C0 and
C1 switched to output
High-speed channels C2 and
C3 switched to output
High-speed channels D0 and
D1 switched to output
High-speed channels D2 and
D3 switched to output
Addr.
00h
01h
10h
11h
12h
13h
14h
20h
AD8191
Default
40h
40h
01h
00h
00h
00h
00h
03h