LM3S1165 Luminary Micro, Inc, LM3S1165 Datasheet - Page 468
LM3S1165
Manufacturer Part Number
LM3S1165
Description
Lm3s1165 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S1165.pdf
(530 pages)
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Signal Tables
468
Pin Name
I2C0SCL
I2C0SDA
CMOD0
CMOD1
Fault
CCP1
CCP2
CCP3
CCP4
CCP5
CCP6
CCP7
GNDA
GNDA
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
HIB
LDO
NC
Pin Number
34
96
23
35
25
91
85
65
76
99
15
21
33
39
45
54
57
63
69
82
87
94
97
51
70
71
16
9
4
7
Preliminary
Pin Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
I
Buffer Type
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
OD
OD
-
Description
Capture/Compare/PWM 1
Capture/Compare/PWM 2
Capture/Compare/PWM 3
Capture/Compare/PWM 1
Capture/Compare/PWM 5
Capture/Compare/PWM 6
Capture/Compare/PWM 7
CPU Mode bit 0. Input must be set to logic 0
(grounded); other encodings reserved.
CPU Mode bit 1. Input must be set to logic 0
(grounded); other encodings reserved.
PWM Fault
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
The ground reference for the analog circuits
(ADC, Analog Comparators, etc.). These are
separated from GND to minimize the electrical
noise contained on VDD from affecting the
analog functions.
The ground reference for the analog circuits
(ADC, Analog Comparators, etc.). These are
separated from GND to minimize the electrical
noise contained on VDD from affecting the
analog functions.
An output that indicates the processor is in
hibernate mode.
I2C module 0 clock
I2C module 0 data
Low drop-out regulator output voltage. This
pin requires an external capacitor between
the pin and GND of 1 µF or greater. The LDO
pin must also be connected to the VDD25 pins
at the board level in addition to the decoupling
capacitor(s).
No connect. Leave the pin electrically
unconnected/isolated.
July 26, 2008
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