LM3S1512 Luminary Micro, Inc, LM3S1512 Datasheet - Page 9

• Manufacturer Part Number: LM3S1512
• Description: Lm3s1512 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

Figure 15-3.
Figure 15-4.
Figure 15-5.
Figure 15-6.
Figure 15-7.
Figure 15-8.
Figure 15-9.
Figure 15-10. Master Burst RECEIVE .................................................................................................. 384
Figure 15-11. Master Burst RECEIVE after Burst SEND ........................................................................ 385
Figure 15-12. Master Burst SEND after Burst RECEIVE ........................................................................ 386
Figure 15-13. Slave Command Sequence ............................................................................................ 387
Figure 16-1.
Figure 16-2.
Figure 16-3.
Figure 17-1.
Figure 17-2.
Figure 18-1.
Figure 18-2.
Figure 21-1.
Figure 21-2.
Figure 21-3.
Figure 21-4.
Figure 21-5.
Figure 21-6.
Figure 21-7.
Figure 21-8.
Figure 21-9.
Figure 21-10. External Reset Timing (RST) .......................................................................................... 481
Figure 21-11. Power-On Reset Timing ................................................................................................. 482
Figure 21-12. Brown-Out Reset Timing ................................................................................................ 482
Figure 21-13. Software Reset Timing ................................................................................................... 482
Figure 21-14. Watchdog Reset Timing ................................................................................................. 482
Figure 22-1.
Figure 22-2.
July 25, 2008
START and STOP Conditions ......................................................................................... 377
Complete Data Transfer with a 7-Bit Address ................................................................... 378
R/S Bit in First Byte ........................................................................................................ 378
Data Validity During Bit Transfer on the I
Master Single SEND ...................................................................................................... 381
Master Single RECEIVE ................................................................................................. 382
Master Burst SEND ....................................................................................................... 383
Analog Comparator Module Block Diagram ..................................................................... 412
Structure of Comparator Unit .......................................................................................... 413
Comparator Internal Reference Structure ........................................................................ 414
QEI Block Diagram ........................................................................................................ 424
Quadrature Encoder and Velocity Predivider Operation .................................................... 426
100-Pin LQFP Package Pin Diagram .............................................................................. 441
108-Ball BGA Package Pin Diagram (Top View) ............................................................... 442
Load Conditions ............................................................................................................ 474
I
Hibernation Module Timing ............................................................................................. 477
SSI Timing for TI Frame Format (FRF=01), Single Transfer Timing Measurement .............. 478
SSI Timing for MICROWIRE Frame Format (FRF=10), Single Transfer ............................. 478
SSI Timing for SPI Frame Format (FRF=00), with SPH=1 ................................................. 479
JTAG Test Clock Input Timing ......................................................................................... 480
JTAG Test Access Port (TAP) Timing .............................................................................. 480
JTAG TRST Timing ........................................................................................................ 480
100-Pin LQFP Package .................................................................................................. 483
108-Ball BGA Package .................................................................................................. 485
2
C Timing ..................................................................................................................... 477
Preliminary
2
C Bus ............................................................... 378
LM3S1512 Microcontroller
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