LM3S6110 Luminary Micro, Inc, LM3S6110 Datasheet - Page 23
LM3S6110
Manufacturer Part Number
LM3S6110
Description
Lm3s6110 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S6110.pdf
(472 pages)
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July 25, 2008
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Internal Memory
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General-Purpose Timers
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Memory protection unit (MPU), providing a privileged mode for protected operating system
functionality
Unaligned data access, enabling data to be efficiently packed into memory
Atomic bit manipulation (bit-banding), delivering maximum memory utilization and streamlined
peripheral control
64 KB single-cycle flash
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•
16 KB single-cycle SRAM
Three General-Purpose Timer Modules (GPTM), each of which provides two 16-bit timers.
Each GPTM can be configured to operate independently:
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32-bit Timer modes
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16-bit Timer modes
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16-bit Input Capture modes
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User-managed flash block protection on a 2-KB block basis
User-managed flash data programming
User-defined and managed flash-protection block
As a single 32-bit timer
As one 32-bit Real-Time Clock (RTC) to event capture
For Pulse Width Modulation (PWM)
Programmable one-shot timer
Programmable periodic timer
Real-Time Clock when using an external 32.768-KHz clock as the input
User-enabled stalling in periodic and one-shot mode when the controller asserts the CPU
Halt flag during debug
General-purpose timer function with an 8-bit prescaler
Programmable one-shot timer
Programmable periodic timer
User-enabled stalling when the controller asserts CPU Halt flag during debug
Input edge count capture
Input edge time capture
Preliminary
LM3S6110 Microcontroller
23
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