LM3S6110 Luminary Micro, Inc, LM3S6110 Datasheet - Page 410
LM3S6110
Manufacturer Part Number
LM3S6110
Description
Lm3s6110 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S6110.pdf
(472 pages)
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Signal Tables
17
17.1
410
Signal Tables
The following tables list the signals available for each pin. Functionality is enabled by software with
the GPIOAFSEL register.
Important:
Table 17-1 on page 410 shows the pin-to-signal-name mapping, including functional characteristics
of the signals. Table 17-2 on page 414 lists the signals in alphabetical order by signal name.
Table 17-3 on page 418 groups the signals by functionality, except for GPIOs. Table 17-4 on page
420 lists the GPIO pins and their alternate functionality.
100-Pin LQFP Package Pin Tables
Table 17-1. Signals by Pin Number
Pin Number
10
11
12
13
1
2
3
4
5
6
7
8
9
All multiplexed pins are GPIOs by default, with the exception of the five JTAG pins (PB7
and PC[3:0]) which default to the JTAG functionality.
Pin Name
VDDA
GNDA
PWM0
PWM1
LDO
VDD
GND
PD0
PD1
PD2
PD3
NC
NC
NC
NC
Preliminary
Pin Type
I/O
I/O
I/O
I/O
O
O
-
-
-
-
-
-
-
-
-
Buffer Type
Power
Power
Power
Power
Power
TTL
TTL
TTL
TTL
TTL
TTL
-
-
-
-
Description
No connect. Leave the pin electrically
unconnected/isolated.
No connect. Leave the pin electrically
unconnected/isolated.
The positive supply (3.3 V) for the analog
circuits (ADC, Analog Comparators, etc.).
These are separated from VDD to minimize
the electrical noise contained on VDD from
affecting the analog functions.
The ground reference for the analog circuits
(ADC, Analog Comparators, etc.). These are
separated from GND to minimize the electrical
noise contained on VDD from affecting the
analog functions.
No connect. Leave the pin electrically
unconnected/isolated.
No connect. Leave the pin electrically
unconnected/isolated.
Low drop-out regulator output voltage. This
pin requires an external capacitor between
the pin and GND of 1 µF or greater. The LDO
pin must also be connected to the VDD25 pins
at the board level in addition to the decoupling
capacitor(s).
Positive supply for I/O and some logic.
Ground reference for logic and I/O pins.
GPIO port D bit 0
PWM 0
GPIO port D bit 1
PWM 1
GPIO port D bit 2
GPIO port D bit 3
July 25, 2008
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