LM3S6952 Luminary Micro, Inc, LM3S6952 Datasheet - Page 547

• Manufacturer Part Number: LM3S6952
• Description: Lm3s6952 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

July 25, 2008
Pin Name
I2C0SCL
I2C0SDA
ERBIAS
GNDPHY
GNDPHY
GNDPHY
CMOD0
CMOD1
Fault
CCP1
CCP2
CCP3
GNDA
GNDA
IDX0
LED0
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
HIB
LDO
Pin Number
M12
C12
A11
E11
B10
L10
K10
F10
F12
C11
J10
F11
J12
E2
K3
C4
C5
H3
K5
K6
B6
B5
A5
K4
C8
C9
E3
L6
F2
J3
F1
Preliminary
Pin Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
I
I
I
I
I
I
Buffer Type
Analog
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
OD
OD
Description
Capture/Compare/PWM 1
Capture/Compare/PWM 2
Capture/Compare/PWM 3
CPU Mode bit 0. Input must be set to logic 0
(grounded); other encodings reserved.
CPU Mode bit 1. Input must be set to logic 0
(grounded); other encodings reserved.
12.4 KOhm resistor (1% precision) used
internally for Ethernet PHY.
PWM Fault
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
The ground reference for the analog circuits
(ADC, Analog Comparators, etc.). These are
separated from GND to minimize the electrical
noise contained on VDD from affecting the
analog functions.
The ground reference for the analog circuits
(ADC, Analog Comparators, etc.). These are
separated from GND to minimize the electrical
noise contained on VDD from affecting the
analog functions.
GND of the Ethernet PHY
GND of the Ethernet PHY
GND of the Ethernet PHY
An output that indicates the processor is in
hibernate mode.
I2C module 0 clock
I2C module 0 data
QEI module 0 index
Low drop-out regulator output voltage. This
pin requires an external capacitor between
the pin and GND of 1 µF or greater. The LDO
pin must also be connected to the VDD25 pins
at the board level in addition to the decoupling
capacitor(s).
MII LED 0
LM3S6952 Microcontroller
547