LM3S102 Luminary Micro, Inc, LM3S102 Datasheet - Page 125
LM3S102
Manufacturer Part Number
LM3S102
Description
Lm3s102 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S102.pdf
(330 pages)
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July 6, 2006
Reset
Type
Reset
Type
GPIO Digital Input Enable (GPIODEN)
Offset 0x51C
RO
RO
31
15
0
0
31:8
7:0
Bit
Register 18: GPIO Digital Input Enable (GPIODEN), offset 0x51C
The GPIODEN register is the digital input enable register. By default, all GPIO signals are
configured as digital inputs at reset. The only time that a pin should not be configured as a digital
input is when the GPIO pin is configured to be one of the analog input signals for the analog
comparator.
RO
RO
30
14
0
0
reserved
Name
DEN
RO
RO
29
13
0
0
RO
RO
28
12
0
0
reserved
Type
R/W
RO
RO
RO
27
11
0
0
RO
RO
26
10
0
0
Reset
0xFF
0
RO
RO
25
0
9
0
Preliminary
Description
Reserved bits return an indeterminate value, and should never
be changed.
Digital-Input Enable
0: Digital input disabled
1: Digital input enabled
RO
RO
24
0
8
0
reserved
R/W
RO
23
0
7
1
R/W
RO
22
0
6
1
R/W
RO
21
0
5
1
R/W
RO
20
0
4
1
DEN
R/W
RO
19
0
3
1
LM3S102 Data Sheet
R/W
RO
18
0
2
1
R/W
RO
17
0
1
1
R/W
RO
16
0
0
1
125
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