LM3S102 Luminary Micro, Inc, LM3S102 Datasheet - Page 304
LM3S102
Manufacturer Part Number
LM3S102
Description
Lm3s102 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S102.pdf
(330 pages)
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Analog Comparator
304
Reset
Reset
Type
Type
Bit/Field
Analog Comparator Control 0 (ACCTL0)
Offset 0x024
31:11
RO
RO
31
15
0
0
10:9
8:5
3:2
4
1
Register 6: Analog Comparator Control 0 (ACCTL0), offset 0x24
This register configures that comparator’s input and output.
RO
RO
30
14
0
0
reserved
reserved
ASRCP
ISLVAL
Name
CINV
ISEN
reserved
RO
RO
29
13
0
0
RO
RO
28
12
0
0
Type
R/W
R/W
R/W
R/W
RO
RO
RO
RO
27
11
0
0
R/W
RO
RO
26
10
0
0
0
ASRCP
Reset
0
0
0
0
0
0
R/W
RO
RO
25
0
9
0
0
Preliminary
RO
RO
RO
24
Description
Reserved bits return an indeterminate value, and should
never be changed.
The ASRCP field specifies the source of input voltage to the
VIN+ terminal of the comparator. The encodings for this field
are as follows:
Reserved bits return an indeterminate value, and should
never be changed.
The ISLVAL bit specifies the sense value of the input that
generates an interrupt if in Level Sense mode. If 0, an
interrupt is generated if the comparator output is Low.
Otherwise, an interrupt is generated if the comparator output
is High.
The ISEN field specifies the sense of the comparator output
that generates an interrupt. The sense conditioning is as
follows:
The CINV bit conditionally inverts the output of the
comparator. If 0, the output of the comparator is unchanged. If
1, the output of the comparator is inverted prior to being
processed by hardware.
0
8
0
0
reserved
ASRCP
00
01
10
11
ISEN
00
01
10
11
RO
RO
RO
23
0
7
0
0
reserved
Function
Pin value
Pin value of C0+
Internal voltage reference
Reserved
RO
RO
RO
22
0
6
0
0
Function
Level sense, see ISLVAL
Falling edge
Rising edge
Either edge
RO
RO
RO
21
0
5
0
0
ISLVAL
R/W
RO
RO
20
0
4
0
0
R/W
RO
RO
19
0
3
0
0
ISEN
R/W
RO
RO
18
0
2
0
0
CINV
R/W
RO
RO
17
July 6, 2006
0
1
0
0
reserved
RO
RO
RO
16
0
0
0
0
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