LM3S8933 Luminary Micro, Inc, LM3S8933 Datasheet - Page 464
LM3S8933
Manufacturer Part Number
LM3S8933
Description
Lm3s8933 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S8933.pdf
(588 pages)
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Ethernet Controller
17.4
Table 17-2. Ethernet Register Map
464
Ethernet MAC
Offset
0x00C
0x01C
0x02C
0x000
0x000
0x004
0x008
0x010
0x014
0x018
0x020
0x024
0x030
0x034
Name
MACRIS
MACIACK
MACIM
MACRCTL
MACTCTL
MACDATA
MACIA0
MACIA1
MACTHR
MACMCTL
MACMDV
MACMTXD
MACMRXD
MACNP
5.
6.
7.
Ethernet Register Map
Table 17-2 on page 464 lists the Ethernet MAC registers. All addresses given are relative to the
Ethernet MAC base address of 0x4004.8000.
The IEEE 802.3 standard specifies a register set for controlling and gathering status from the PHY.
The registers are collectively known as the MII Management registers and are detailed in Section
22.2.4 of the IEEE 802.3 specification. Table 17-2 on page 464 also lists these MII Management
registers. All addresses given are absolute and are written directly to the REGADR field of the
MACMCTL register. The format of registers 0 to 15 are defined by the IEEE specification and are
common to all PHY implementations. The only variance allowed is for features that may or may not
be supported by a specific PHY. Registers 16 to 31 are vendor-specific registers, used to support
features that are specific to a vendors PHY implementation. Vendor-specific registers not listed are
reserved.
Enable both the Transmitter and Receive by setting the LSB in both the MACTCTL and
MACRCTL registers.
To transmit a frame, write the frame into the TX FIFO using the MACDATA register. Then set
the NEWTX bit in the MACTR register to initiate the transmit process. When the NEWTX bit has
been cleared, the TX FIFO is available for the next transmit frame.
To receive a frame, wait for the NPR field in the MACNP register to be non-zero. Then begin
reading the frame from the RX FIFO by using the MACDATA register. When the frame (including
the FCS field) has been read, the NPR field should decrement by one. When there are no more
frames in the RX FIFO, the NPR field reads 0.
Type
W1C
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
RO
0x0000.0000
0x0000.0000
0x0000.007F
0x0000.0008
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.003F
0x0000.0000
0x0000.0080
0x0000.0000
0x0000.0000
0x0000.0000
Reset
Preliminary
Description
Ethernet MAC Raw Interrupt Status
Ethernet MAC Interrupt Acknowledge
Ethernet MAC Interrupt Mask
Ethernet MAC Receive Control
Ethernet MAC Transmit Control
Ethernet MAC Data
Ethernet MAC Individual Address 0
Ethernet MAC Individual Address 1
Ethernet MAC Threshold
Ethernet MAC Management Control
Ethernet MAC Management Divider
Ethernet MAC Management Transmit Data
Ethernet MAC Management Receive Data
Ethernet MAC Number of Packets
July 25, 2008
page
See
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481
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