LM3561TMX National Semiconductor Corporation, LM3561TMX Datasheet - Page 22
LM3561TMX
Manufacturer Part Number
LM3561TMX
Description
Synchronous Boost Converter With 600ma High Side Led Driver And I2c-compatible Interface
Manufacturer
National Semiconductor Corporation
Datasheet
1.LM3561TMX.pdf
(34 pages)
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I
The 7 bit I
1010011 (53). After the START condition, the I
sends the 7-bit address followed by an eighth bit, read or write
(R/W). R/W = 0 indicates a WRITE (0xA6) and R/W = '1' in-
TRANSFERRING DATA
Every byte on the SDA line must be eight bits long with the
most significant bit (MSB) transferred first. Each byte of data
must be followed by an acknowledge bit (ACK). The acknowl-
edge related clock pulse (9th clock pulse) is generated by the
2
C-COMPATIBLE CHIP ADDRESS
2
C-compatible device address for the LM3561 is
FIGURE 13. I
FIGURE 14. Device Address
2
C master
2
C-Compatible Timing
22
dicates a READ (0xA7). The second byte following the device
address selects the register address to which the data will be
written. The third byte contains the data for the selected reg-
ister.
master. The master releases SDA (HIGH) during the 9th clock
pulse (write mode). The LM3561 pulls down SDA during the
9th clock pulse, signifying an acknowledge. An acknowledge
is generated after each byte has been received.
30113920
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