LM3561TMX National Semiconductor Corporation, LM3561TMX Datasheet - Page 6

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LM3561TMX

Manufacturer Part Number
LM3561TMX
Description
Synchronous Boost Converter With 600ma High Side Led Driver And I2c-compatible Interface
Manufacturer
National Semiconductor Corporation
Datasheet

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Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings are conditions under which operation of
the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions, see
the Electrical Characteristics table.
Note 2: All voltages are with respect to the potential at the GND pin.
Note 3: Internal thermal shutdown circuitry protects the device from permanent damage. Thermal shutdown engages at T
T
Note 4: For detailed soldering specifications and information, please refer to National Semiconductor Application Note 1112: Micro SMD Wafer Level chip Scale
Package (AN-1112)
Note 5: In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may have to be
derated. Maximum ambient temperature (T
dissipation of the device in the application (P
following equation: T
Note 6: Junction-to-ambient thermal resistance (θ
JEDEC standard JESD51-7. The test board is a 4-layer FR-4 board measuring 102mm x 76mm x 1.6mm with a 2x1 array of thermal via's. The ground plane on
the board is 50mm x 50mm. Thickness of copper layers are 36µm/18µm/18µm/36µm (1.5oz/1oz/1oz/1.5oz). Ambient temperature in simulation is 22°C, still air.
Power dissipation is 1W.
Note 7: Min and Max limits are guaranteed by design, test, or statistical analysis. Typical (Typ) numbers are not guaranteed, but do represent the most likely
norm. Unless otherwise specified, conditions for typical specifications are: V
Note 8: The typical curve for Over-Voltage Protection (OVP) is measured in closed loop using the typical application circuit . The OVP value is found by forcing
an open circuit in the LED current path and recording the peak value of V
ramping the voltage at OUT until the OVP comparator trips. The closed loop data can appear higher due to the stored energy in the inductor being dumped into
the output capacitor after the OVP comparator trips. This results in an open circuit condition where the output voltage can continue to rise after the OVP comparator
trips by approximately I
Note 9: The typical curve for Current Limit is measured in closed loop using the typical application circuit by increasing I
increasing. The value given in the Electrical Table is measured open loop and is found by forcing current into SW until the current limit comparator threshold is
reached. Closed loop data appears higher due to the delay between the comparator trip point and the NFET turning off. This delay allows the closed loop inductor
current to ramp higher after the trip point by approximately 40ns × V
Note 10: Guaranteed by design. Not production tested.
Note 11: The timeout duration period is a divided down representation of the 2MHz clock and thus the accuracy spec. is the same as the switching frequency.
This accuracy spec. applies to all settings in
Note 12: Min rise and fall times on SDA and SCL can typically be less than 20ns.
J
=135ºC (typ.).
A-MAX
IN
×sqrt(L/C
= T
J-MAX-OP
OUT
).
– (θ
JA
A-MAX
× P
D-MAX
Table
D-MAX
) is dependent on the maximum operating junction temperature (T
), and the junction-to-ambient thermal resistance of the part/package in the application (θ
JA
8.
) is taken from a thermal modeling result, performed under the conditions and guidelines set forth in the
).
IN
/L
OUT
IN
. The value given in the Electrical Table is found in an open loop configuration by
= 3.6V and T
6
A
= +25ºC.
J-MAX-OP
OUT
J
=150ºC (typ.) and disengages at
= +125ºC), the maximum power
until the peak inductor current stops
JA
), as given by the

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