MT16HTF12864AY-53EC2 Micron, MT16HTF12864AY-53EC2 Datasheet - Page 20

• Manufacturer Part Number: MT16HTF12864AY-53EC2
• Description: DRAM Chip, 512MB, 1GB, 2GB (x64, DR) PC2-3200, PC2-4200, 240-Pin DDR2 SDRAM UDIMM
• Manufacturer: Micron

I
timing requirements for I
Table 14: I
All Bank Interleave Read operation; Legend: A = active; RA = read auto precharge; D = deselect
NOTE:
pdf: 09005aef80f09084, source: 09005aef80f09068
HTF16C64_128_256x64AG.fm - Rev. B 8/04 EN
DD
DEVICE
BANKS
Table 14, I
All banks are being interleaved at minimum
address bus inputs are STABLE during DESELECTs; I
7 Conditions
4
8
GRADE
SPEED
-40E
-53E
-40E
-53E
DD
DD
7 Timing Patterns, specifies detailed
7 Timing Patterns
IDD7 TIMING PATTERNS
A0 RA0 A1 RA1 A2 RA2 A3 RA3 D D D D
A0 RA0 D A1 RA1 D A2 RA2 D A3 RA3 D D D D D
A0 RA0 A1 RA1 A2 RA2 A3 RA3 A4 RA4 A5 RA5 A6 RA6 A7 RA7
A0 RA0 A1 RA1 A2 RA2 A3 RA3 D D A4 RA4 A5 RA5 A6 RA6 A7 RA7 D D
DD
PC2-3200, PC2-4200, 240-Pin DDR2 SDRAM UDIMM
7. Changes will be
t
RC (I
DD
OUT
) without violating
= 0mA.
20
required if timing parameter changes are made to the
specification.
Micron Technology, Inc., reserves the right to change products or specifications without notice.
512MB, 1GB, 2GB (x64, DR)
t
RRD (I
DD
) using a burst length of 4; control and
©2004 Micron Technology, Inc. All rights reserved.