MT18VDDF6472G-202 Micron, MT18VDDF6472G-202 Datasheet - Page 12

• Manufacturer Part Number: MT18VDDF6472G-202
• Description: 184-PIN REGISTERED DDR SDRAM DIMM
• Manufacturer: Micron

64 Meg x72 184 Pin Registered DDR SDRAM DIMM
DDF18C64x72G_A.p65 – Pub. 02/02
I
(Notes: 1–5, 8, 10, 12; notes appear following parameter tables)
(0°C
*DDR SDRAM components only
PARAMETER/CONDITION
OPERATING CURRENT: One device bank; Active-Precharge;
t
changing once per clock cycle; Address and control inputs
changing once every two clock cycles.
OPERATING CURRENT: One device bank; Active-Read-Precharge; I
Burst = 2;
and control inputs changing once per clock cycle.
PRECHARGE POWER-DOWN STANDBY CURRENT: All device
banks idle; Power-down mode;
IDLE STANDBY CURRENT: CS# = HIGH; All device banks idle;
t
changing once per clock cycle. V
ACTIVE POWER-DOWN STANDBY CURRENT: One device bank
active; Power-down mode;
ACTIVE STANDBY CURRENT: CS# = HIGH; CKE = HIGH; One
device bank; Active-Precharge;
(MIN); DQ, DM, and DQS inputs changing twice per clock cycle;
Address and other control inputs changing once per clock cycle.
OPERATING CURRENT: Burst = 2; Reads; Continuous burst; One
device bank active; Address and control inputs changing once
per clock cycle;
OPERATING CURRENT: Burst = 2; Writes; Continuous burst; One
device bank active; Address and control inputs changing once
per clock cycle;
changing twice per clock cycle.
AUTO REFRESH CURRENT
SELF REFRESH CURRENT: CKE
OPERATING CURRENT: Four device bank interleaving READs
(BL=4) with auto precharge with,
t
during Active READ, or WRITE commands.
DD
RC =
CK =
CK =
SPECIFICATIONS AND CONDITIONS
T
t
t
t
RC (MIN);
CK (MIN); CKE = HIGH; Address and other control inputs
A
CK (MIN); Address and control inputs change only
t
+70°C; V
RC =
t
t
t
CK =
CK =
RC (MIN);
t
CK =
DD
Q = +2.5V ±0.2V, V
t
t
CK (MIN); I
CK (MIN); DQ, DM, and DQS inputs
t
CK (MIN); DQ, DM, and DQS inputs
t
t
CK =
CK =
t
t
RC =
0.2V
CK =
IN
t
OUT
CK (MIN); I
t
CK (MIN); CKE = LOW.
= V
t
RC = minimum
= 0mA.
t
t
REF
RAS (MAX);
CK (MIN); CKE = LOW.
DD
for DQ, DQS, and DM.
= +2.5V ±0.2V)
OUT
184-PIN REGISTERED DDR SDRAM DIMM
t
t
RC =
RC = 7.8125µs
= 0mA; Address
*
t
CK =
t
RC allowed;
t
RFC (MIN)
12
t
CK
SYM
I
I
I
I
I
I
DD
I
I
DD
I
I
I
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
4W
2P
3P
3N
4R
2F
5
0
1
5
6
7
a
Micron Technology, Inc., reserves the right to change products or specifications without notice.
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-26A/-265
MAX
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512MB (x72)
-202
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PRELIMINARY
UNITS NOTES
©2002, Micron Technology, Inc.
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
m A
21, 28,
21, 28,
20, 44
20, 43
20, 43
20, 43
20, 45
24, 44
45
46
45
42
20
9