HMP525F7FFP4C-xx Hynix Semiconductor, HMP525F7FFP4C-xx Datasheet - Page 12
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HMP525F7FFP4C-xx
Manufacturer Part Number
HMP525F7FFP4C-xx
Description
240pin Fully Buffered DDR2 SDRAM DIMMs
Manufacturer
Hynix Semiconductor
Datasheet
1.HMP525F7FFP4C-XX.pdf
(26 pages)
Rev 1.2 / Feb. 2009
Advanced Memory Buffer(AMB) DRAM Interface Specifications
Please refer to the AMB Specification for all technical requirements
The following specifications for the AMB constitute the subset which is critical for proper operation of the
DDR2 SDRAM interface.
Note:
This list is not complete, more information will follow in later revisions of this specification.
Critical AMB Specifications
Note 1:
The timing numbers are for example only. Design should be based on the latest component specifications
tDQSCKamb DQS/DQS-to-CK/CK output skew
tDVBamb
tDVAamb
tCVBamb
tCVAamb
Symbol
tSU
C
tH
IN
DQ to DQS, DQS setup time (read)
DQ to DQS, DQS hold time (read)
AMB Data Valid Before DQS
AMB Data Valid After DQS
C/A/CNTL Valid Before Clock
C/A/CNTL Valid After Clock
Input Capacitance(DQ/DQS/DQS)
Parameter
1
240pin Fully Buffered DDR2 SDRAM DIMMs
Output
Output
Output
Output
Output
Type
Input
Input
VDDQ =1.8V +/-0.1V
1030
-240
Min
470
470
890
2.0
Max
245
245
240
2.5
Units Notes
ps
ps
ps
ps
ps
ps
pF
ps
1
1
1
1
1
1
1
1
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