MT9044AP1 Zarlink Semiconductor, Inc., MT9044AP1 Datasheet - Page 12

• Manufacturer Part Number: MT9044AP1
• Description: Framer: Framer Circuit: T1/E1/OC3 System Synchronizer
• Manufacturer: Zarlink Semiconductor, Inc.

MT9044
Data Sheet
The frequency accuracy of Holdover Mode is ±0.05ppm, which translates to a worst case 35 frame (125us) slips in
24 hours. This meets the Bellcore GR-1244-CORE Stratum 3 requirement of ±0.37ppm (255 frame slips per 24
hours).
Two factors affect the accuracy of Holdover Mode. One is drift on the Master Clock while in Holdover Mode, drift on
the Master Clock directly affects the Holdover Mode accuracy. Note that the absolute Master Clock (OSCi)
accuracy does not affect Holdover accuracy, only the change in OSCi accuracy while in Holdover. For example, a
±32ppm master clock may have a temperature coefficient of ±0.1ppm per degree C. So a 10 degree change in
temperature, while the MT9044 is in Holdover Mode may result in an additional offset (over the ±0.05ppm) in
frequency accuracy of ±1ppm, which is much greater than the ±0.05ppm of the MT9044.
The other factor affecting accuracy is large jitter on the reference input prior (30ms to 60ms) to the mode switch.
For instance, jitter of 7.5UI at 700Hz may reduce the Holdover Mode accuracy from 0.05ppm to 0.10ppm.
Freerun Mode
Freerun Mode is typically used when a master clock source is required, or immediately following system power-up
before network synchronization is achieved.
In Freerun Mode, the MT9044 provides timing and synchronization signals which are based on the master clock
frequency (OSCi) only, and are not synchronized to the reference signals (PRI and SEC).
The accuracy of the output clock is equal to the accuracy of the master clock (OSCi). So if a ±32ppm output clock is
required, the master clock must also be ±32ppm. See Applications - Crystal and Clock Oscillator sections.
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