MT9196AS Zarlink Semiconductor, Inc., MT9196AS Datasheet - Page 31
MT9196AS
Manufacturer Part Number
MT9196AS
Description
Integrated Digital Phone Circuit (IDPC)
Manufacturer
Zarlink Semiconductor, Inc.
Datasheet
1.MT9196AS.pdf
(46 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MT9196AS
Manufacturer:
MITEL
Quantity:
20 000
Company:
Part Number:
MT9196AS1
Manufacturer:
ZARLINK
Quantity:
15
† AC Electrical Characteristics are over recommended temperature range & recommended power supply voltages.
‡ Typical figures are at 25 C and are for design aid only: not guaranteed and not subject to production testing.
* Note: TxINC, refer to Control Register 2, address 0Fh.
AC Characteristics
A-Law, at the CODEC. (V
1
2
3
4
5
6
7
8
9
Analog input equivalent to
overload decision
Absolute half-channel gain
M
MIC + to PCM
AUXin to PCM
Tolerance at all other transmit
filter settings
(1 to 7dB)
Gain tracking vs. input level
CCITT G.714 Method 2
Signal to total Distortion vs. input
level
CCITT G.714 Method 2
Transmit Idle Channel Noise
Gain relative to gain at 1020Hz
<50Hz
60Hz
200Hz
300 - 3000 Hz
3000 - 3400 Hz
4000 Hz
>4600 Hz
Absolute Delay
Group Delay relative to D
Power Supply Rejection
f=1020 Hz
f=0.3 to 3 kHz
f=3 to 4 kHz
f=4 to 50 kHz
to PCM
Characteristics
Ref
=1.0 volts and V
†
for A/D (Transmit) Path
AX
Bias
=2.5 volts.)
PSSR1
PSSR2
PSSR3
A
A
PSSR
G
G
G
G
G
G
Sym
D
G
G
N
N
D
D
Li3.17
Li3.14
AX1
AX2
AX3
AX4
AX5
AX6
QX
CX
DX
PX
RX
AX
TX
-0.25
14.3
18.8
18.8
Min
-0.2
-0.3
-0.6
-1.6
-0.9
5.0
9.5
9.5
35
29
24
37
40
35
40
- 0dBm0 = 1.421V
Typ
5.79
15.3
20.3
20.3
360
750
380
130
750
-71
6.0
6.0
11
11
15
‡
-12.5
Max
16.3
12.5
21.8
12.5
21.8
+0.2
16.5
0.25
0.25
-69
-25
-30
-25
7.0
0.3
0.6
1.6
0.0
rms
for -Law and 1.477V
dBrnC0
dBm0p
Units
Vp-p
Vp-p
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
s
s
s
s
s
A-Law
Both at CODEC
Transmit filter gain=0dB
setting. Digital gain=0dB
setting.
TxINC = 0*
TxINC = 1*
TxINC = 0*
TxINC = 1*
TxINC = 0*
TxINC = 1*
@1020 Hz
3 to -40 dBm0
-40 to -50 dBm0
-50 to -55 dBm0
0 to -30 dBm0
-40 dBm0
-45 dBm0
A-Law
at frequency of minimum
delay
500-600 Hz
600 - 1000 Hz
1000 - 2600 Hz
2600 - 2800 Hz
100mVRMS
PSSR1-3 not production
tested
V
-Law
-Law
-law
DD
Test Conditions
rms
for
MT9196
7-165