MT8888CN Zarlink Semiconductor, Inc., MT8888CN Datasheet
![no-image](/images/no-image-200.jpg)
MT8888CN
Available stocks
Related parts for MT8888CN
MT8888CN Summary of contents
Page 1
... V DD Ref SS DS5432 MT8888CE MT8888CS MT8888CN The receiver section is based upon the industry standard transmitter converter for low distortion, high accuracy DTMF signalling. Internal counters provide a burst mode such that tone bursts can be transmitted with precise timing. A call progress filter can be selected allowing a microprocessor to analyze call progress tones ...
Page 2
MT8888C 1 IN VRef 4 5 VSS OSC1 6 OSC2 7 TONE PIN PLASTIC DIP/SOIC Pin Description Pin # Name IN+ Non-inverting op-amp input ...
Page 3
Functional Description The MT8888C Integrated DTMF consists of a high performance DTMF receiver with an internal gain setting amplifier and a DTMF generator which employs a burst counter to synthesize precise tone bursts and pauses. A call progress mode can ...
Page 4
MT8888C Following the filter section is a decoder employing digital counting techniques to frequencies of the incoming tones and to verify that they correspond to standard DTMF frequencies. A complex averaging algorithm protects against tone simulation by extraneous signals such ...
Page 5
selected by the designer. Different steering arrangements may be used to select independent tone present (t tone absent (t ) guard times. This may be GTA necessary to meet system specifications which place both accept ...
Page 6
MT8888C EXPLANATION OF EVENTS A) TONE BURSTS DETECTED, TONE DURATION INVALID, RX DATA REGISTER NOT UPDATED. B) TONE #n DETECTED, TONE DURATION VALID, TONE DECODED AND LATCHED IN RX DATA REGISTER. C) END OF TONE #n DETECTED, TONE ABSENT DURATION ...
Page 7
Burst Mode In certain telephony applications it is required that DTMF signals being generated are of a specific duration determined either by application or by any one of the exchange transmitter specifications currently existing. Standard DTMF signal timing can be ...
Page 8
MT8888C The Fourier components of correspond to V .... V as measured on the output 2f nf waveform. The total harmonic distortion for a dual tone can be calculated using Equation 2. V correspond to the low group amplitude and ...
Page 9
MT8888C 9 ...
Page 10
BIT NAME b0 TOUT Tone Output Control. A logic high enables the tone output; a logic low turns the tone output off. This bit controls all transmit tone functions. b1 CP/DTMF Call Progress or DTMF Mode Select. A logic high ...
Page 11
MT8888C BIT NAME b0 IRQ b1 TRANSMIT DATA REGISTER EMPTY (BURST MODE ONLY) b2 RECEIVE DATA REGISTER FULL b3 DELAYED STEERING 8031/8051 8080/8085 Figure 12 - MT8888C Interface Connections for Various Intel Micros C1 R1 DTMF/CP INPUT R5 DTMF OUTPUT ...
Page 12
MMD6150 (or equivalent) TEST POINT 130 Test load for D0-D3 pins A software reset must be included at the beginning of all programs to initialize the control registers after power up.The initialization procedure should be implemented 100ms ...
Page 13
MT8888C Absolute Maximum Ratings Parameter 1 Power supply voltage Voltage on any pin 3 Current at any pin (Except V DD and 4 Storage temperature 5 Package power dissipation * Exceeding these values may cause ...
Page 14
Electrical Characteristics Gain Setting Amplifier - Voltages are with respect to ground (V Characteristics 1 Input leakage current 2 Input resistance 3 Input offset voltage 4 Power supply rejection 5 Common mode rejection 6 DC open loop voltage gain 7 ...
Page 15
MT8888C AC Electrical Characteristics Characteristics 1 Accept Bandwidth 2 Lower freq. (REJECT) 3 Upper freq. (REJECT) 4 Call progress tone detect level (total power) † Characteristics are over recommended operating conditions unless otherwise stated ‡ Typical figures are at 25 ...
Page 16
AC Electrical Characteristics Characteristics 1 RD/WR clock frequency 2 RD/WR cycle period 3 RD/WR rise and fall time 4 Address setup time 5 Address hold time 6 Data hold time (read valid data delay (read) 8 RD, ...
Page 17
MT8888C RD/WR RD CS, RS0 DATA BUS Figure 17 - 8031/8051/8085 Read Timing Diagram WR CS, RS0 DATA BUS Figure 18 - 8031/8051/8085 Write Timing Diagram 17 t CYC PWH t PWL Figure 16 - ...
Page 18
Package Outlines Notes Not to scale 2) Dimensions in inches 3) (Dimensions in millimeters) Plastic Dual-In-Line Packages (PDIP Suffix 8-Pin DIM Plastic Min Max A 0.210 (5.33) A 0.115 (2.92) ...
Page 19
Notes Not to scale 2) Dimensions in inches 3) (Dimensions in millimeters) Plastic Dual-In-Line Packages (PDIP Suffix 22-Pin DIM Plastic Min Max A 0.210 (5.33) A 0.125 (3.18) 0.195 ...
Page 20
16-Pin DIM Min Max Min A 0.093 0.104 0.093 (2.35) (2.65) (2.35) A 0.004 0.012 0.004 1 (0.10) (0.30) (0.10) B 0.013 0.020 0.013 (0.33) (0.51) (0.33) C 0.009 0.013 0.009 (0.231) (0.318) (0.231) D 0.398 0.413 ...
Page 21
Small Shrink Outline Package (SSOP Suffix Pin Notes: 1) Not to scale 2) Dimensions in inches 3) (Dimensions in millimeters) 4) Ref. JEDEC Standard M0-150/M0118 for 48 Pin 5) A ...
Page 22
For more information about all Zarlink products visit our Web Site at www.zarlink.com ’ ’ “ ” ...