CS8406 Cirrus Logic, CS8406 Datasheet - Page 30
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CS8406
Manufacturer Part Number
CS8406
Description
192 KHZ DIGITAL AUDIO INTERFACE TRANSMITTER
Manufacturer
Cirrus Logic
Datasheet
1.CS8406.pdf
(43 pages)
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9. PIN DESCRIPTION - SOFTWARE MODE
30
VD
VL
GND
RST
H/S
TXN
TXP
OMCK
ISCLK
ILRCK
SDIN
SDA / CDOUT
23
22
24
25
26
21
13
12
14
6
9
AD0 / CS
Digital Power ( Input ) - Digital core power supply. Typically +3.3 V or +5.0 V.
Logic Power ( Input ) - Input/Output power supply. Typically +3.3 V or +5.0 V.
Ground ( Input ) - Ground for I/O and core logic.
Reset ( Input ) - When RST is low, the CS8406 enters a low power mode and all internal states are reset.
On initial power up, RST must be held low until the power supply is stable, and all input clocks are stable
in frequency and phase. This is particularly true in hardware mode with multiple CS8406 devices, where
synchronization between devices is important.
Hardware/Software Control Mode Select ( Input ) -Determines the method of controlling the operation
of the CS8406, and the method of accessing CS and U data. In software mode, device control and CS
and U data access is primarily through the control port, using a microcontroller. To select Software
mode, this pin should be permanently tied to GND.
Differential Line Drivers ( Output ) - These pins transmit biphase encoded data. The drivers are pulled
low while the CS8406 is in the reset state.
Master Clock ( Input ) - The frequency can be set through the control port registers.
Serial Audio Bit Clock ( Input / Output ) - Serial bit clock for audio data on the SDIN pin.
Serial Audio Input Left/Right Clock ( Input / Output ) - Word rate clock for the audio data on the SDIN
pin.
Serial Audio Data Port ( Input ) - Audio data serial input pin.
ILRCK
ISCLK
TEST
TEST
TEST
TEST
TEST
SDIN
RXP
AD2
RST
VD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
TEST
SCL / CCLK
AD1 / CDIN
TXP
TXN
H/S
VL
GND
OMCK
U
INT
TEST
TEST
TCBL
CS8406
DS580F1