CS8406 Cirrus Logic, CS8406 Datasheet - Page 34

• Manufacturer Part Number: CS8406
• Description: 192 KHZ DIGITAL AUDIO INTERFACE TRANSMITTER
• Manufacturer: Cirrus Logic

34
11.PIN DESCRIPTION - HARDWARE MODE
VD
VL
GND
RST
H/S
TXN
TXP
OMCK
ISCLK
ILRCK
SDIN
SFMT0
SFMT1
23
22
24
25
26
21
13
12
14
6
9
4
5
COPY / C
Digital Power ( Input ) - Digital core power supply. Typically +3.3 V or +5.0 V.
Logic Power ( Input ) - Input/Output power supply. Typically +3.3 V or +5.0 V.
Ground ( Input ) - Ground for I/O and core logic.
Reset ( Input ) - When RST is low, the CS8406 enters a low power mode and all internal states are reset.
On initial power up, RST must be held low until the power supply is stable, and all input clocks are stable
in frequency and phase. This is particularly true in hardware mode with multiple CS8406 devices, where
synchronization between devices is important.
Hardware/Software Control Mode Select ( Input ) -Determines the method of controlling the operation
of the CS8406, and the method of accessing CS and U data. Hardware mode provides an alternate
mode of operation, and access to CS and U data is provided by dedicated pins. To select Hardware
mode, this pin should be permanently tied to VL.
Differential Line Drivers ( Output ) - These pins transmit biphase encoded data. The drivers are pulled
low while the CS8406 is in the reset state.
Master Clock ( Input ) - The frequency can be set through the HWCK[1:0] pins.
Serial Audio Bit Clock ( Input / Output ) - Serial bit clock for audio data on the SDIN pin.
Serial Audio Input Left/Right Clock ( Input / Output ) - Word rate clock for the audio data on the SDIN
pin.
Serial Audio Data Port ( Input ) - Audio data serial input pin.
Serial Audio Data Format Select ( Input ) - Selects the serial audio input port format. See Table 3 on
page 33.
TCBLD
SFMT0
SFMT1
ILRCK
ISCLK
EMPH
APMS
TEST
TEST
TEST
SDIN
RST
VD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
ORIG
HWCK1
TXP
TXN
H/S
VL
GND
OMCK
HWCK0
AUDIO
U
V
CEN
TCBL
CS8406
DS580F1