CYNCP80192 Cypress Semiconductor, CYNCP80192 Datasheet - Page 32

• Manufacturer Part Number: CYNCP80192
• Description: Network Database Coprocessor
• Manufacturer: Cypress Semiconductor

Table 16-5. AC Timing Parameters for ZBT and Flow-Through SSRAM
Document #: 38-02043 Rev. *B
T
T
T
T
T
T
T
T
T
T
T
T
T
Parameter
CLK
CKHI
CKLO
SA
HA
CKOV
CLK2
CLKPHSL
CKSE
SCK
CKSD
CKOLZ
CKOHZ
CLK period: max frequency
CLK high pulse; worst-case 40%–60% duty cycle
CLK low pulse; worst-case 40%–60% duty cycle
Address setup time to CLK rising edge
Address hold time to CLK rising edge
Clock to output valid (network processor interface)
Clock to CLK2X delay
Clock to PHS_L delay
Clock to output valid (NSE Interface)
Clock to SCLK delay
Clock to output valid (SDATA)
Clock to output in low-Z
Clock to output in high-Z
Description
Test Conditions
Load (pF)
30
40
20
CYNPC80192–83
Min
8
8
6
2
3
CYNCP80192
Max
50
18
12
13
4
7
6
7
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MHz
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns