XRP7704 Exar Corporation, XRP7704 Datasheet

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XRP7704

Manufacturer Part Number
XRP7704
Description
Quad-output Digital Pwm Buck Controller
Manufacturer
Exar Corporation
Datasheet

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GENERAL DESCRIPTION
The XRP7704 is a quad-output pulse-width modulated
(PWM) step-down DC-DC controller with a built-in LDO for
standby power and GPIOs. The device provides a complete
power management solution in one IC and is fully
programmable
Independent
channels regulate output voltages and provide all required
protection functions such as current limiting and over-voltage
protection.
Each output voltage can be programmed from 0.9V to 5.1V
without the need of an external voltage divider. The wide
range of the programmable DPWM switching frequency
(from 300 KHz to 1.5 MHz) enables the user to optimize
between efficiency and component size. Input voltage range
is from 6.5V to 20V.
I
communicate with the host for fault reporting and handling,
power rail parameters monitoring, etc.
The device offers a complete solution for soft-start and soft-
stop. The start-up delay and ramp of each PWM regulator
can be independently controlled. The device can start up a
pre-biased PWM channel without causing large negative
inductor current.
APPLICATIONS
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (510) 668-7000 • FAX (510) 668-7017 •
2
C bus interface is provided to program the IC as well as to
September 2009
Computing: Servers, Storage Systems
Consumer: Set-top box (STB), Game Systems
Industrial: ATE, DC-DC converters, Video Processing
Plasma Display Panel (PDP)
Networking and Telecommunications Equipment
Digital
via the included I
Pulse
Width
2
C
Modulator
serial
interface.
(DPWM)
Quad-Output Digital PWM Buck Controller
1
KEY FEATURES
Four switching buck (step-down) controllers each with
internal FET drivers
6.5V to 20V input voltage range – no additional voltage
rails required
Output voltages programmable from 0.9V to 5.1V
Up to 6 reconfigurable GPIO pins
Fully programmable via I
Independent Digital Pulse Width Modulator (DPWM)
channels with five coefficient PID control
High Integration: elimination of external circuits and
components
adjustment and interface
Programmable DPWM frequency range (300 kHz to 1.5
MHz) enables efficiency and component size optimization
Complete power monitoring and reporting
Independently controlled start-up delay and ramp for each
regulator, including soft start with a pre-biased load
voltage
Independently controlled soft-stop delay and ramp for
each regulator with a programmable stop voltage
Over-temperature protection (OTP) and Under Voltage
Lockout (UVLO); per-channel over-current protection
(OCP) and over-voltage protection (OVP)
Built-in LDO (configurable to 3.3V or 5V) with over-current
protection
Non-volatile memory for system configuration
Configuration development tools
required
2
C interface
for
compensation,
XRP7704
www.exar.com
REV 1.1.0
parameter

Related parts for XRP7704

XRP7704 Summary of contents

Page 1

... September 2009 GENERAL DESCRIPTION The XRP7704 is a quad-output pulse-width modulated (PWM) step-down DC-DC controller with a built-in LDO for standby power and GPIOs. The device provides a complete power management solution in one IC and is fully programmable via the included I Independent Digital Pulse Width channels regulate output voltages and provide all required protection functions such as current limiting and over-voltage protection ...

Page 2

... V ♦ 100 mV ♦ 1 µA 120 kΩ 2 XRP7704 =C =1nF CONDITIONS LDOOUT enabled (no load) No switching converter channels enabled I2C Communication Active Switching Frequency = 400kHz VIN1 = VIN2 = 12V 4 channels running GH and GL = 1nF Load each VIN = 12V Switching Frequency = 300KHz ...

Page 3

... TYP MAX UNITS 1500 kHz 90 deg 120 deg 40 ns 125 XRP7704 CONDITIONS 6.5 <= VIN <= 20V ♦ 1 0mA < I < 100mA LDOOUT 6.5 <= VIN <= 20V ♦ 1 0mA < I < 100mA LDOOUT ♦ V =0V LDOOUT CONDITIONS ♦ ♦ CONDITIONS Referred to the input ...

Page 4

... V 0.4 V -10 10 µA 250 TYP MAX UNITS Ω 3 Ω 50 kΩ 4 XRP7704 CONDITIONS ♦ ♦ ♦ ♦ 1mA SINK ♦ 1mA SOURCE ♦ 0mA SOURCE CONDITIONS Based upon I2C Master Clock VIO = 3.3 V ±10% VIO = 3.3 V ±10% VIO = 3.3 V±10 3mA SINK Input is between 0 ...

Page 5

... REV 1.1.0 XRP7704 INTERNAL BLOCK DIAGRAM VOUT1 PreScaler Vtar DAC VOUT2 PreScaler Vtar DAC VOUT3 VOUT4 VCC LDO VDD GPIO 0-3 GPIO SDA,SCL I2C EXAR CONFIDENTIAL. PROPRIETARY. DO NOT DISTRIBUTE OR COPY. Quad-Output Digital PWM Buck Controller Channel 1 Feedback Digital Hybrid ADC PID DPWM SS & PD ...

Page 6

... REV 1.1.0 XRP7704 PACKAGE OUTLINE – QFN 1 AVDD 2 DVDD 3 GPIO0 4 GPIO1 5 GPIO2 6 GPIO3 7 GPIO4 8 GPIO5 9 ENABLE 10 DGND EXAR CONFIDENTIAL. PROPRIETARY. DO NOT DISTRIBUTE OR COPY. Quad-Output Digital PWM Buck Controller XRP7704 TQFN 6mm X 6mm Exposed Pad: AGND 6 XRP7704 30 GL2 29 LX2 28 GH2 27 BST2 26 VCCD 25 BST4 ...

Page 7

... The high side driver is connected between the BST pin and LX pin. EXAR CONFIDENTIAL. PROPRIETARY. DO NOT DISTRIBUTE OR COPY. Quad-Output Digital PWM Buck Controller DESCRIPTION The VIN1 pin needs to be tied to VIN2 on the This pin should be connected to 7 XRP7704 ...

Page 8

... LDOOUT compensation capacitor should be used on this pin [see Application Note]. If ENABLE is pulled high, the chip powers up (logic reset, registers configuration 9 ENABLE loaded, etc.). If pulled low for longer than 100us, the XRP7704 is placed into shutdown. Analog Ground. Exposed AGND PAD Connect to analog ground (as noted above for pin 11). ...

Page 9

... The “AAAA” Suffix will differentiate the configuration of a specific customer. EXAR CONFIDENTIAL. PROPRIETARY. DO NOT DISTRIBUTE OR COPY. Quad-Output Digital PWM Buck Controller +125 C ......................................... Lead Free 40 PIN TQFN +125 C ................Lead Free 40 PIN TQFN, Tape and Reel 9 XRP7704 ORDERING INFORMATION Package ...

Page 10

... EXAR CONFIDENTIAL. PROPRIETARY. DO NOT DISTRIBUTE OR COPY. Quad-Output Digital PWM Buck Controller 12Vin Combined Efficiency: 5V, 3V3, 1V8 & 300kHz PWM Frequency FETs: Si4944; Inductor: 744314xxx 7x7x5mm 12Vin Efficiency: Single Channel 1MHz - Channels not in use are disabled FET: FDS8984; Inductor:744310200 7x7x3mm 10 XRP7704 ...

Page 11

... Startup into 3V prebias - 5V output EXAR CONFIDENTIAL. PROPRIETARY. DO NOT DISTRIBUTE OR COPY. Quad-Output Digital PWM Buck Controller CH1:3.3V CH2:5V CH3:1V CH4:1.8V Simultaneous Soft-Stop CH1:5V CH2:3.3V CH3:1.8V CH4:1.2V Sequential Soft-Stop Configuration Vout Shutdown = 0.8V, 3A load CH1:3.3V CH2:5V CH3:1V CH4:1.8V Sequential Soft-Stop Configuration Vout Shutdown = 0.8V, No load 11 XRP7704 ...

Page 12

... REV 1.1.0 APPLICATION INFORMATION (Cont) CH1:Iout (1A/div) CH2: Vout (3.3V) Load Transient Response Temperature Regulation 1.0 V out (+/- 1% Vo window) EXAR CONFIDENTIAL. PROPRIETARY. DO NOT DISTRIBUTE OR COPY. Quad-Output Digital PWM Buck Controller Temperature Regulation 1.8 V out (+/- 1% Vo window) 12 XRP7704 ...

Page 13

... Reliability is enhanced via communication with the system controller which can obtain real time data on an output voltage, input voltage and current. - System processors can communicate with the XRP7704 directly to obtain data or make adjustments to react to circuit conditions - A system processor could also be configured to log and analyze operating history, perform diagnostics and if required, take the supply off-line after making other system adjustments ...

Page 14

... Non-Volatile Configuration Memory The non-volatile memory (NVM) in XRP7704 stores the configuration data for the chip and all of the power rails. This memory is normally configured during manufacturing time. Once a specific bit of the NVM is programmed, that bit can never be reprogrammed again [i ...

Page 15

... REV 1.1.0 Chip Power-Up The figure below shows the power-up sequence of XRP7704 during the normal operation. The startup stage is divided into three phases. The first phase is the internal LDO power-up phase. The second phase is the configuration transfer phase. The third phase is chip ready phase. The power up sequence is less than 1ms. ...

Page 16

... GPIO, and/or I Enabling, Disabling and Reset The XRP7704 is enabled via raising the ENABLE Pin high. The chip can then be disabled by lowering the same ENABLE Pin. There is also the capability for resetting the Chip via an I For enabling a specific channel, there are several ways that this can be achieved. The chip can be configured to enable a channel at start-up as the default configuration residing in the non-volatile configuration memory of the IC ...

Page 17

... When an under voltage fault condition occurs (either on VIN1 or VIN2), the fault flag register is set and all of the XRP7704 outputs are shut down. The measured input voltages can be read back using the READ_VIN1 or READ_VIN2 register, and both registers have a resolution of 100mV per LSB. When the UVLO condition clears (voltage rises above the UVLO Warning Threshold), the chip can be configured to automatically restart ...

Page 18

... R1 and R2 follow the definition below. Output Voltage Lower Than 0.9V The XRP7704 can be programmed to regulate an output voltage lower than 0.9V. However, in this case the specification of +-2% output voltage accuracy may be exceeded. EXAR CONFIDENTIAL. PROPRIETARY. DO NOT DISTRIBUTE OR COPY. ...

Page 19

... Output Current Setting and Monitoring XRP7704 utilizes a low side MOSFET Rdson current sensing technique. The voltage drop on Rdson is measured by dedicated current ADC. The ADC results are compared to a maximum current threshold and an over-current warning threshold to generate the fault and warning flags. ...

Page 20

... Bits [15:10] specify the delay after enabling a channel but before outputting pulses; where each bit represents 250us steps. Bits [9:0] specify the rise time of the channel; these 10 bits define the number of microseconds for each 50mV increment to reach the target voltage. EXAR CONFIDENTIAL. PROPRIETARY. DO NOT DISTRIBUTE OR COPY. Quad-Output Digital PWM Buck Controller Channel Power Up Sequence 20 XRP7704 ...

Page 21

... Power Good Flag The XRP7704 allows the user to set the upper and lower bound for a power good signal per channel. The SET_PWRG_TARG_MAX_CHx register sets the upper bound, the SET_PWRG_TARG_MIN_CHx register sets the lower bound. Each register has a 20mV LSB resolution. When the output voltage is within bounds the power good signal is asserted high ...

Page 22

... The PWM switching frequency is set by choosing the corresponding oscillator frequency and clock divider ratio in the SET_SW_FREQUENCY register. Bits [6:4] set the oscillator frequency and bits [2:0] set the clock divider. The tables below summarize the available Main Oscillator and PWM switching frequency settings in the XRP7704. Main Oscillator Frequency ...

Page 23

... The maximum duty cycle is dictated by the minimum required time to sample the current when the low side MOSFET is on. For the XRP7704, the minimum required sampling time is about 16 clock cycles at the main oscillator frequency. When calculating maximum duty cycle, the sampling time needs to be subtracted using the below equation ...

Page 24

... XRP7704 when an external clock is required. By selecting the appropriate bit combination the user can configure the IC to function as a master or a slave when two or more XRP7704s are used to convert power in a system. Automatic clock selection is also provided to allow operation even if the external clock fails by switching the IC back to an internal clock ...

Page 25

... REV 1.1.0 Master/Slave configure of the XRP7704 External Clock Synchronization Master Slave combination When an external clock is used, the user will need to setup the master to also have an external clock in function. All of the same rules apply as in the External clock synchronization, Synchronized operation as a Slave unit section of this document ...

Page 26

... GPIO Pins The General Purpose Input Output (GPIO) Pins are the basic interface between the XRP7704 and the system. Although all of the stored data within the IC can be read back using the I have some of those internal register to be displayed and or controlled by a single data pin. Besides simple input output functions the GPIO pins can be configured to serve as external clock inputs ...

Page 27

... Select the capacitance to satisfy the specification for output voltage overshoot/undershoot caused by the current step load. A sudden decrease in the EXAR CONFIDENTIAL. PROPRIETARY. DO NOT DISTRIBUTE OR COPY. Quad-Output Digital PWM Buck Controller 2 C devices on the bus). 27 XRP7704 ...

Page 28

... D is the duty cycle EXAR CONFIDENTIAL. PROPRIETARY. DO NOT DISTRIBUTE OR COPY. Quad-Output Digital PWM Buck Controller − ⋅ out − out − ⋅ Δ ⋅ out out = ⋅ − out 28 XRP7704 ...

Page 29

... Δ = ⋅ ESR I I ESR out rip Δ = Δ + Δ Tot Cin ESR ⋅ ⋅ out cond out dson cond thja ambient R thja 29 XRP7704 Δ . The V ESR is the total MOSFET thermal ...

Page 30

... REV 1.1.0 REV 1.1.0 Package Drawing Package Drawing EXAR CONFIDENTIAL. PROPRIETARY. DO NOT DISTRIBUTE OR COPY. EXAR CONFIDENTIAL. PROPRIETARY. DO NOT DISTRIBUTE OR COPY. Quad-Output Digital PWM Buck Controller Quad-Output Digital PWM Buck Controller 40 PIN 6x6mm TQFN 40 PIN 6x6mm TQFN 30 30 XRP7704 XRP7704 ...

Page 31

... EXAR Corporation is adequately protected under the circumstances. EXAR CONFIDENTIAL. PROPRIETARY. DO NOT DISTRIBUTE OR COPY. Quad-Output Digital PWM Buck Controller DESCRIPTION Initial release customersupport@exar.com http://www.exar.com/TechDoc/default.aspx? Exar Corporation Headquarters and Sales Office 48720 Kato Road Fremont, CA 94538 main: 510-668-7000 fax: 510-668-7030 31 XRP7704 REVISION HISTORY ...

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