D63GS NEC, D63GS Datasheet - Page 11
D63GS
Manufacturer Part Number
D63GS
Description
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Manufacturer
NEC
Datasheet
1.D63GS.pdf
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2.6 Data Pointer (DP): 10 Bits
bits 4 and 5 of the P3 register (CR0).
2.7 Accumulator (A): 4 Bits
operations.
The ROM data table can be referenced by setting the ROM address in the data pointer to call the ROM contents.
The low-order 8 bits of the ROM address are specified by R0 of the data memory; and the high-order 2 bits by
When reset, the pointer contents become “000H”.
The accumulator, which refers to a register consisting of 4 bits, plays a leading role in performing various
When reset, the accumulator contents are left undefined.
P3
DP
P3 Register
b
5
9
DP
b
R
4
1n
8
(high-order 4 bits) R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
1A
1B
1C
1D
1E
10
11
12
13
14
15
16
17
18
19
1F
Figure 2-4. Data Memory Organization
Figure 2-6. Accumulator Organization
Figure 2-5. Data Pointer Organization
DP
RA
RB
RC
RD
RE
R0
R1
R2
R3
R4
R5
R6
R7
R8
R9
RF
7
A
0n
3
(low-order 4 bits)
DP
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
00
01
02
03
04
05
06
07
08
09
0A
0B
0C
0D
0E
0F
6
A
R
2
10
DP
5
A
DP (refer to 2.6 Data Pointer (DP))
ASR (refer to 2.3 Address Stack Register (ASR (RF)))
1
DP
4
A
0
DP
3
A
DP
2
R
00
DP
1
PD63, 63A, 64
DP
0
R0
11
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